[PATCH v2 3/5] arm64: dts: rockchip: add gpio-line-names to radxa-zero-3

[Kever Yang]

On 2024/8/3 06:12, Jonas Karlman wrote:
> From: Trevor Woerner <twoerner at gmail.com>
>
> Add names to the pins of the general-purpose expansion header as given
> in the Radxa documentation[1] following the conventions in the kernel[2]
> to make it easier for users to correlate pins with functions when using
> utilities such as 'gpioinfo'.
>
> [1] https://docs.radxa.com/en/zero/zero3/hardware-design/hardware-interface
> [2] https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt
>
> Signed-off-by: Trevor Woerner <twoerner at gmail.com>
> Link: https://lore.kernel.org/r/20240620013301.33653-1-twoerner@gmail.com
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
>
> [ upstream commit: f7c742cbe664ebdedc075945e75443683d1175f7 ]
>
> (cherry picked from commit 8b26cf42ba0c74a9c86cebe591a9195f75151d97)
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v2: Add Signed-off-by tag
> ---
>   .../arm64/rockchip/rk3566-radxa-zero-3.dtsi   | 72 +++++++++++++++++++
>   1 file changed, 72 insertions(+)
>
> diff --git a/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3.dtsi b/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3.dtsi
> index 081be841b286..9cc7aa3298d0 100644
> --- a/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3.dtsi
> +++ b/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3.dtsi
> @@ -105,6 +105,78 @@
>   	cpu-supply = <&vdd_cpu>;
>   };
>   
> +&gpio0 {
> +	gpio-line-names =
> +		/* GPIO0_A0 - A7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO0_B0 - B7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO0_C0 - C7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO0_D0 - D7 */
> +		"pin-10 [GPIO0_D0]", "pin-08 [GPIO0_D1]", "",
> +		"", "", "", "", "";
> +};
> +
> +&gpio1 {
> +	gpio-line-names =
> +		/* GPIO1_A0 - A7 */
> +		"pin-03 [GPIO1_A0]", "pin-05 [GPIO1_A1]", "",
> +		"",                  "pin-37 [GPIO1_A4]", "",
> +		"",                  "",
> +		/* GPIO1_B0 - B7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO1_C0 - C7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO1_D0 - D7 */
> +		"", "", "", "", "", "", "", "";
> +};
> +
> +&gpio2 {
> +	gpio-line-names =
> +		/* GPIO2_A0 - A7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO2_B0 - B7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO2_C0 - C7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO2_D0 - D7 */
> +		"", "", "", "", "", "", "", "";
> +};
> +
> +&gpio3 {
> +	gpio-line-names =
> +		/* GPIO3_A0 - A7 */
> +		"",                  "pin-11 [GPIO3_A1]", "pin-13 [GPIO3_A2]",
> +		"pin-12 [GPIO3_A3]", "pin-35 [GPIO3_A4]", "pin-40 [GPIO3_A5]",
> +		"pin-38 [GPIO3_A6]", "pin-36 [GPIO3_A7]",
> +		/* GPIO3_B0 - B7 */
> +		"pin-15 [GPIO3_B0]", "pin-16 [GPIO3_B1]", "pin-18 [GPIO3_B2]",
> +		"pin-29 [GPIO3_B3]", "pin-31 [GPIO3_B4]", "",
> +		"", "",
> +		/* GPIO3_C0 - C7 */
> +		"",                  "pin-22 [GPIO3_C1]", "pin-32 [GPIO3_C2]",
> +		"pin-33 [GPIO3_C3]", "pin-07 [GPIO3_C4]", "",
> +		"", "",
> +		/* GPIO3_D0 - D7 */
> +		"", "", "", "", "", "", "", "";
> +};
> +
> +&gpio4 {
> +	gpio-line-names =
> +		/* GPIO4_A0 - A7 */
> +		"", "", "", "", "", "", "", "",
> +		/* GPIO4_B0 - B7 */
> +		"",                  "",                  "pin-27 [GPIO4_B2]",
> +		"pin-28 [GPIO4_B3]", "", "", "", "",
> +		/* GPIO4_C0 - C7 */
> +		"",                  "",                  "pin-23 [GPIO4_C2]",
> +		"pin-19 [GPIO4_C3]", "",                  "pin-21 [GPIO4_C5]",
> +		"pin-24 [GPIO4_C6]", "",
> +		/* GPIO4_D0 - D7 */
> +		"", "", "", "", "", "", "", "";
> +};
> +
>   &gpu {
>   	mali-supply = <&vdd_gpu_npu>;
>   	status = "okay";