[PATCH 1/3] tqma6: Remove non-DM board code

[Fabio Estevam]

From: Fabio Estevam <festevam at denx.de>

CONFIG_DM_MMC and CONFIG_DM_SPI are alway selected so the mmc
and spi board code can be safely removed.

Remove it to make the code cleaner.

Signed-off-by: Fabio Estevam <festevam at denx.de>
---
 board/tq/tqma6/tqma6.c | 126 -----------------------------------------
 1 file changed, 126 deletions(-)

diff --git a/board/tq/tqma6/tqma6.c b/board/tq/tqma6/tqma6.c
index 445ce987b68..40369f03e72 100644
--- a/board/tq/tqma6/tqma6.c
+++ b/board/tq/tqma6/tqma6.c
@@ -19,33 +19,15 @@
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
-#include <asm/mach-imx/spi.h>
-#include <fsl_esdhc_imx.h>
 #include <linux/libfdt.h>
 #include <mmc.h>
 #include <power/pfuze100_pmic.h>
 #include <power/pmic.h>
-#include <spi_flash.h>
 
 #include "tqma6_bb.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define USDHC_CLK_PAD_CTRL (PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW | \
-	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW | \
-	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define GPIO_OUT_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
-	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
-
-#define GPIO_IN_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
-	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
-	PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
 int dram_init(void)
 {
 	gd->ram_size = imx_ddr_size();
@@ -55,114 +37,6 @@ int dram_init(void)
 
 static const uint16_t tqma6_emmc_dsr = 0x0100;
 
-#ifndef CONFIG_DM_MMC
-/* eMMC on USDHCI3 always present */
-static iomux_v3_cfg_t const tqma6_usdhc3_pads[] = {
-	NEW_PAD_CTRL(MX6_PAD_SD3_CLK__SD3_CLK,		USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_CMD__SD3_CMD,		USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT0__SD3_DATA0,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT1__SD3_DATA1,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT2__SD3_DATA2,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT3__SD3_DATA3,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT4__SD3_DATA4,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT5__SD3_DATA5,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT6__SD3_DATA6,	USDHC_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_SD3_DAT7__SD3_DATA7,	USDHC_PAD_CTRL),
-	/* eMMC reset */
-	NEW_PAD_CTRL(MX6_PAD_SD3_RST__SD3_RESET,	GPIO_OUT_PAD_CTRL),
-};
-
-/*
- * According to board_mmc_init() the following map is done:
- * (U-Boot device node)    (Physical Port)
- * mmc0                    eMMC (SD3) on TQMa6
- * mmc1 .. n               optional slots used on baseboard
- */
-struct fsl_esdhc_cfg tqma6_usdhc_cfg = {
-	.esdhc_base = USDHC3_BASE_ADDR,
-	.max_bus_width = 8,
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-	int ret = 0;
-
-	if (cfg->esdhc_base == USDHC3_BASE_ADDR)
-		/* eMMC/uSDHC3 is always present */
-		ret = 1;
-	else
-		ret = tqma6_bb_board_mmc_getcd(mmc);
-
-	return ret;
-}
-
-int board_mmc_getwp(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-	int ret = 0;
-
-	if (cfg->esdhc_base == USDHC3_BASE_ADDR)
-		/* eMMC/uSDHC3 is always present */
-		ret = 0;
-	else
-		ret = tqma6_bb_board_mmc_getwp(mmc);
-
-	return ret;
-}
-
-int board_mmc_init(struct bd_info *bis)
-{
-	imx_iomux_v3_setup_multiple_pads(tqma6_usdhc3_pads,
-					 ARRAY_SIZE(tqma6_usdhc3_pads));
-	tqma6_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	if (fsl_esdhc_initialize(bis, &tqma6_usdhc_cfg)) {
-		puts("Warning: failed to initialize eMMC dev\n");
-	} else {
-		struct mmc *mmc = find_mmc_device(0);
-		if (mmc)
-			mmc_set_dsr(mmc, tqma6_emmc_dsr);
-	}
-
-	tqma6_bb_board_mmc_init(bis);
-
-	return 0;
-}
-#endif
-
-#ifndef CONFIG_DM_SPI
-static iomux_v3_cfg_t const tqma6_ecspi1_pads[] = {
-	/* SS1 */
-	NEW_PAD_CTRL(MX6_PAD_EIM_D19__GPIO3_IO19, SPI_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
-	NEW_PAD_CTRL(MX6_PAD_EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
-};
-
-#define TQMA6_SF_CS_GPIO IMX_GPIO_NR(3, 19)
-
-static unsigned const tqma6_ecspi1_cs[] = {
-	TQMA6_SF_CS_GPIO,
-};
-
-__weak void tqma6_iomuxc_spi(void)
-{
-	unsigned i;
-
-	for (i = 0; i < ARRAY_SIZE(tqma6_ecspi1_cs); ++i)
-		gpio_direction_output(tqma6_ecspi1_cs[i], 1);
-	imx_iomux_v3_setup_multiple_pads(tqma6_ecspi1_pads,
-					 ARRAY_SIZE(tqma6_ecspi1_pads));
-}
-
-#if defined(CONFIG_SF_DEFAULT_BUS) && defined(CONFIG_SF_DEFAULT_CS)
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
-	return ((bus == CONFIG_SF_DEFAULT_BUS) &&
-		(cs == CONFIG_SF_DEFAULT_CS)) ? TQMA6_SF_CS_GPIO : -1;
-}
-#endif
-#endif
 
 int board_early_init_f(void)
 {
-- 
2.34.1