[PATCH 1/8] riscv: Make A ISA extension selectable
Chia-Wei Wang
chiawei_wang at aspeedtech.com
Mon Aug 19 12:16:57 CEST 2024
Make the Atomic (A) ISA extension selectable. Thus CPUs such as
Ibex without the A extension can be supported.
Signed-off-by: Chia-Wei Wang <chiawei_wang at aspeedtech.com>
---
arch/riscv/Kconfig | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fa3b016c52..c5859c5c54 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -308,7 +308,10 @@ config TPL_USE_ARCH_STRNCMP
endmenu
config RISCV_ISA_A
- def_bool y
+ bool "Standard extension for Atomic Instructions"
+ default y
+ help
+ Adds "A" to the ISA string passed to the compiler.
config DMA_ADDR_T_64BIT
bool
--
2.25.1
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