[PATCH] rockchip: add SPI NOR flash support for Radxa E25(CM3I)

[Quentin Schulz]

Hi Naoki,

On 8/25/24 12:07 AM, FUKAUMI Naoki wrote:
> some SKU for CM3I SoM have a SPI NOR flash. this patch enables related
> configurations and changes devicetree.
> 
> => sf probe
> SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
> 
> Signed-off-by: FUKAUMI Naoki <naoki at radxa.com>
> ---
> Changes in v2:
> - reword commit message
> ---
>   arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 16 ++++++++++++++++
>   configs/radxa-e25-rk3568_defconfig        | 14 ++++++++++++++
>   2 files changed, 30 insertions(+)
> 
> diff --git a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> index 74755a44eae..1f0bacbf61f 100644
> --- a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> @@ -21,6 +21,22 @@
>   	mmc-hs400-enhanced-strobe;
>   };
>   
> +&sfc {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	flash at 0 {
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		bootph-pre-ram;
> +		bootph-some-ram;
> +		spi-max-frequency = <24000000>;
> +		spi-rx-bus-width = <4>;
> +		spi-tx-bus-width = <1>;
> +	};
> +};
> +

Was this sent upstream to the Linux kernel already? I did a very quick 
search on lore.kernel.org and didn't find anything. Is there anything 
that's preventing you from sending this to them first? I really would 
prefer to have only U-Boot specific stuff in -u-boot.dtsi DTSIs.

Cheers,
Quentin