[PATCH 6/6] x86: Add msr command
Simon Glass
sjg at chromium.org
Wed Aug 28 03:44:29 CEST 2024
It is useful to obtain the results of MSR queries as well as to update
MSR registers, so add a command these tasks.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
cmd/x86/Makefile | 2 +-
cmd/x86/msr.c | 52 ++++++++++++++++++++++++++++++++++++
doc/usage/cmd/msr.rst | 61 +++++++++++++++++++++++++++++++++++++++++++
doc/usage/index.rst | 1 +
test/cmd/Makefile | 2 +-
test/cmd/msr.c | 38 +++++++++++++++++++++++++++
6 files changed, 154 insertions(+), 2 deletions(-)
create mode 100644 cmd/x86/msr.c
create mode 100644 doc/usage/cmd/msr.rst
create mode 100644 test/cmd/msr.c
diff --git a/cmd/x86/Makefile b/cmd/x86/Makefile
index 1648907ac2d..925215235d3 100644
--- a/cmd/x86/Makefile
+++ b/cmd/x86/Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
obj-$(CONFIG_CMD_CBSYSINFO) += cbsysinfo.o
-obj-y += cpuid.o mtrr.o
+obj-y += cpuid.o msr.o mtrr.o
obj-$(CONFIG_CMD_EXCEPTION) += exception.o
obj-$(CONFIG_USE_HOB) += hob.o
obj-$(CONFIG_HAVE_FSP) += fsp.o
diff --git a/cmd/x86/msr.c b/cmd/x86/msr.c
new file mode 100644
index 00000000000..3cb70d1f89a
--- /dev/null
+++ b/cmd/x86/msr.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * The 'cpuid' command provides access to the CPU's cpuid information
+ *
+ * Copyright 2024 Google, LLC
+ * Written by Simon Glass <sjg at chromium.org>
+ */
+
+#include <command.h>
+#include <vsprintf.h>
+#include <asm/msr.h>
+
+static int do_read(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct msr_t msr;
+ ulong op;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ op = hextoul(argv[1], NULL);
+ msr = msr_read(op);
+ printf("%08x %08x\n", msr.hi, msr.lo);
+
+ return 0;
+}
+
+static int do_write(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct msr_t msr;
+ ulong op;
+
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+ op = hextoul(argv[1], NULL);
+ msr.hi = hextoul(argv[2], NULL);
+ msr.lo = hextoul(argv[3], NULL);
+ msr_write(op, msr);
+
+ return 0;
+}
+
+U_BOOT_LONGHELP(msr,
+ "read <op> - read a machine-status register (MSR) as <hi 32-bits> <lo 32-bits>\n"
+ "write <op< <hi> <lo> - write an MSR");
+
+U_BOOT_CMD_WITH_SUBCMDS(msr, "Machine Status Registers", msr_help_text,
+ U_BOOT_CMD_MKENT(read, CONFIG_SYS_MAXARGS, 1, do_read, "", ""),
+ U_BOOT_CMD_MKENT(write, CONFIG_SYS_MAXARGS, 1, do_write, "", ""));
diff --git a/doc/usage/cmd/msr.rst b/doc/usage/cmd/msr.rst
new file mode 100644
index 00000000000..04ee52cc1c7
--- /dev/null
+++ b/doc/usage/cmd/msr.rst
@@ -0,0 +1,61 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+ single: msr (command)
+
+msr command
+===========
+
+Synopsis
+--------
+
+::
+
+ msr read <op>
+ msr write <op> <hi> <lo>
+
+Description
+-----------
+
+The msr command reads and writes machine-status registers (MSRs) on x86 CPUs.
+The information is a 64-bit value split into two parts, <hi> for the top 32
+bits and <lo> for the bottom 32 bits.
+
+The operation <op> selects what information is read or written.
+
+msr read
+~~~~~~~~
+
+This reads an MSR and displays the value obtained.
+
+msr write
+~~~~~~~~~
+
+This writes a value to an MSR.
+
+Configuration
+-------------
+
+The msr command is only available on x86.
+
+Return value
+------------
+
+The return value $? is 0 (true).
+
+Example
+-------
+
+This shows reading msr 0x194 which is MSR_FLEX_RATIO on Intel CPUs::
+
+ => msr read 194
+ 00000000 00011200 # Bits 16 (flex ratio enable) and 20 (lock) are set
+
+This shows adjusting the energy-performance bias on an Intel CPU::
+
+ => msr read 1b0
+ 00000000 00000006 # 6 means 'normal'
+
+ => msr write 1b0 0 f # change to power-save
+ => msr read 1b0
+ 00000000 0000000f
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 986554090af..2e60afb297e 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -87,6 +87,7 @@ Shell commands
cmd/mbr
cmd/md
cmd/mmc
+ cmd/msr
cmd/mtest
cmd/mtrr
cmd/panic
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index dedcec33c8e..fb6795a87a5 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -12,7 +12,7 @@ ifdef CONFIG_CONSOLE_RECORD
obj-$(CONFIG_CMD_PAUSE) += test_pause.o
endif
obj-y += exit.o mem.o
-obj-$(CONFIG_X86) += cpuid.o
+obj-$(CONFIG_X86) += cpuid.o msr.o
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
obj-$(CONFIG_CMD_BDI) += bdinfo.o
obj-$(CONFIG_CMD_FDT) += fdt.o
diff --git a/test/cmd/msr.c b/test/cmd/msr.c
new file mode 100644
index 00000000000..e9a152ee5bf
--- /dev/null
+++ b/test/cmd/msr.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for msr command
+ *
+ * Copyright 2024 Google LLC
+ * Written by Simon Glass <sjg at chromium.org>
+ */
+
+#include <test/cmd.h>
+#include <test/ut.h>
+
+static int cmd_test_msr(struct unit_test_state *uts)
+{
+ ut_assertok(run_commandf("msr read 200"));
+ ut_assert_nextline("00000000 ffe00006");
+ ut_assert_console_end();
+
+ /* change the first variable msr and see it reflected in the mtrr cmd */
+ ut_assertok(run_commandf("mtrr"));
+ ut_assert_nextline("CPU 65537:");
+ ut_assert_nextlinen("Reg");
+ ut_assert_nextlinen("0 Y Back 00000000ffe00000");
+ ut_assertok(console_record_reset_enable());
+
+ /* change the type from 6 to 5 */
+ ut_assertok(run_commandf("msr write 200 0 ffe00005"));
+ ut_assert_console_end();
+
+ /* Now it shows 'Protect' */
+ ut_assertok(run_commandf("mtrr"));
+ ut_assert_nextline("CPU 65537:");
+ ut_assert_nextlinen("Reg");
+ ut_assert_nextlinen("0 Y Protect 00000000ffe00000");
+ ut_assertok(console_record_reset_enable());
+
+ return 0;
+}
+CMD_TEST(cmd_test_msr, UTF_CONSOLE);
--
2.34.1
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