[PATCH v3] gpio: mxc_gpio: fix reading state of GPIO pins in output mode

Peng Fan peng.fan at nxp.com
Wed Aug 28 09:07:46 CEST 2024


> Subject: [PATCH v3] gpio: mxc_gpio: fix reading state of GPIO pins in
> output mode

You may give a look to this

https://lore.kernel.org/u-boot/57015C5F.3080209@denx.de/

Regards,
Peng.

> 
> The PSR register works correctly for GPIO pins in input mode, but
> always returns 0 for GPIO pins in output mode unless the SION bit is
> set.
> 
> The DR register should be used for GPIO pins in output mode to allow
> correct getting of previously set output value.
> 
> Please note that the Linux gpio-mxc driver already uses the DR register
> for all GPIO pins in output mode:
> 
> 
> Signed-off-by: Tomas Paukrt <tomaspaukrt at email.cz>
> ---
>  drivers/gpio/mxc_gpio.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index
> cac6b32..190c70e 100644
> --- a/drivers/gpio/mxc_gpio.c
> +++ b/drivers/gpio/mxc_gpio.c
> @@ -133,7 +133,10 @@ int gpio_get_value(unsigned gpio)
> 
>  	regs = (struct gpio_regs *)gpio_ports[port];
> 
> -	val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
> +	if ((readl(&regs->gpio_dir) >> offset) & 0x01)
> +		val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
> +	else
> +		val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
> 
>  	return val;
>  }
> @@ -210,7 +213,10 @@ static void mxc_gpio_bank_set_value(struct
> gpio_regs *regs, int offset,
> 
>  static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
> {
> -	return (readl(&regs->gpio_psr) >> offset) & 0x01;
> +	if ((readl(&regs->gpio_dir) >> offset) & 0x01)
> +		return (readl(&regs->gpio_dr) >> offset) & 0x01;
> +	else
> +		return (readl(&regs->gpio_psr) >> offset) & 0x01;
>  }
> 
>  /* set GPIO pin 'gpio' as an input */
> --
> 2.7.4
> 


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