[PATCH 10/20] dt-bindings: clock: Add SC5xx clock tree bindings
Oliver Gaskell via B4 Relay
devnull+Oliver.Gaskell.analog.com at kernel.org
Wed Aug 28 12:02:18 CEST 2024
From: Oliver Gaskell <Oliver.Gaskell at analog.com>
Add devicetree schema for the clock tree on Analog Devices SC5xx series
SoCs.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison at timesys.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell at analog.com>
---
MAINTAINERS | 1 +
.../clock/adi,sc5xx-clocks.yaml | 112 +++++++++++++++++++++
2 files changed, 113 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c283e09901..d5f79097a1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -608,6 +608,7 @@ F: arch/arm/dts/sc5*
F: arch/arm/include/asm/arch-adi/
F: arch/arm/mach-sc5xx/
F: doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml
+F: doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml
F: drivers/clk/adi/
F: drivers/serial/serial_adi_uart4.c
F: drivers/timer/adi_sc5xx_timer.c
diff --git a/doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml b/doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml
new file mode 100644
index 0000000000..9bbd5467a0
--- /dev/null
+++ b/doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml
@@ -0,0 +1,112 @@
+# SPDX-License-Identifier: (GPL-2.0+)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/adi,sc5xx-clocks.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock Tree Drivers for Analog Devices SC5XX Processors
+
+maintainers:
+ - Vasileios Bimpikas <vasileios.bimpikas at analog.com>
+ - Utsav Agarwal <utsav.agarwal at analog.com>
+ - Arturs Artamonovs <arturs.artamonovs at analog.com>
+
+description: |
+ These drivers read in the processors CDU (clock distribution unit)
+ and CGU (clock generation unit) values to determine various clock
+ rates
+
+properties:
+ compatible:
+ enum:
+ - adi,sc5xx-clocks # Any
+ - adi,sc57x-clocks # 32-Bit SC573 processor
+ - adi,sc58x-clocks # 32-Bit SC584, SC589 processors
+ - adi,sc594-clocks # 32-Bit SC594 processor
+ - adi,sc598-clocks # 64-Bit SC598 processor
+
+ '#clock-cells':
+ const: 1
+
+ reg:
+ minItems: 3
+ maxItems: 4
+
+ reg-names:
+ description:
+ String reference names for the reg property
+ minItems: 3
+ maxItems: 4
+
+ clocks:
+ description:
+ Specifies the CLKIN0 and CLKIN1 reference clock(s) from which the
+ output frequencies are derived via CDU+CGU
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ description:
+ String reference names for CLKIN0 and CLKIN1
+ minItems: 2
+ maxItems: 2
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#clock-cells'
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ clk0: clocks at 3108d000 {
+ compatible = "adi,sc57x-clocks";
+ reg = <0x3108d000 0x1000>,
+ <0x3108e000 0x1000>,
+ <0x3108f000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&sys_clkin0>, <&sys_clkin1>;
+ clock-names = "sys_clkin0", "sys_clkin1";
+ status = "okay";
+ };
+
+ - |
+ clk1: clocks at 3108d000 {
+ compatible = "adi,sc58x-clocks";
+ reg = <0x3108d000 0x1000>,
+ <0x3108e000 0x1000>,
+ <0x3108f000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&sys_clkin0>, <&sys_clkin1>;
+ clock-names = "sys_clkin0", "sys_clkin1";
+ status = "okay";
+ };
+
+ - |
+ clk2: clocks at 3108d000 {
+ compatible = "adi,sc594-clocks";
+ reg = <0x3108d000 0x1000>,
+ <0x3108e000 0x1000>,
+ <0x3108f000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&sys_clkin0>, <&sys_clkin1>;
+ clock-names = "sys_clkin0", "sys_clkin1";
+ status = "okay";
+ };
+
+ - |
+ clk3: clocks at 3108d000 {
+ compatible = "adi,sc598-clocks";
+ reg = <0x3108d000 0x1000>,
+ <0x3108e000 0x1000>,
+ <0x3108f000 0x1000>,
+ <0x310a9000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&sys_clkin0>, <&sys_clkin1>;
+ clock-names = "sys_clkin0", "sys_clkin1";
+ status = "okay";
+ };
+
--
2.34.1
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