[PATCH v4 8/9] spl: starfive: star64: Setup USB fdt fixup function

[Minda Chen]

Setup star64 USB fdt fixup function. Set dr_mode to host,
and add vbus pin (GPIO25), and set USB 3.0 mode.
the functions can be used by other 7110 board like Milk-V
board.

Signed-off-by: Minda Chen <minda.chen at starfivetech.com>
---
 board/starfive/visionfive2/spl.c | 66 ++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 388a06e4d9..b3034b19a3 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -123,6 +123,69 @@ static const struct starfive_vf2_pro star64_pine64[] = {
 		"tx-internal-delay-ps", "300"},
 };
 
+static void spl_fdt_fixup_usb_vbus_pin(void *fdt, int pin)
+{
+	int offset, pin_offset;
+
+	offset = fdt_path_offset(fdt, "/soc/pinctrl at 13040000"); /* &sysgpio */
+	fdt_add_subnode(fdt, offset, "usb0-0");
+	fdt_setprop_string(fdt, fdt_path_offset(fdt, "/__symbols__"),
+			   "usb_pins", "/soc/pinctrl at 13040000/usb0-0");
+	offset = fdt_path_offset(fdt, "/soc/pinctrl at 13040000/usb0-0");
+
+	/* usb_pins */
+	fdt_create_phandle(fdt, offset);
+	fdt_add_subnode(fdt, offset, "driver-vbus-pin");
+	offset = fdt_path_offset(fdt, "/soc/pinctrl at 13040000/usb0-0/driver-vbus-pin");
+	/* GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS, GPOEN_ENABLE, GPI_NONE) */
+	fdt_setprop_u32(fdt, offset, "pinmux", (0xff07 << 16) | pin);
+	fdt_setprop_empty(fdt, offset, "bias-disable");
+	fdt_setprop_empty(fdt, offset, "input-disable");
+	fdt_setprop_empty(fdt, offset, "input-schmitt-disable");
+	fdt_setprop_u32(fdt, offset, "slew-rate", 0);
+
+	offset = fdt_path_offset(fdt, "/soc/usb at 10100000"); /* &usb0 */
+	fdt_setprop_string(fdt, offset, "pinctrl-names", "default");
+	pin_offset = fdt_path_offset(fdt, "/soc/pinctrl at 13040000/usb0-0");
+	fdt_setprop_u32(fdt, offset, "pinctrl-0",
+			fdt_get_phandle(fdt, pin_offset));
+}
+
+static void spl_fdt_fixup_usb_host(void *fdt)
+{
+	int offset;
+
+	offset = fdt_path_offset(fdt, "/soc/usb at 10100000/usb at 0"); /*&usb_cdns3 */
+	fdt_setprop_string(fdt, offset, "dr_mode", "host");
+}
+
+static void spl_fdt_fixup_set_usb3(void *fdt)
+{
+	int offset, phy_offset;
+
+	/* disable pcie0 */
+	offset = fdt_path_offset(fdt, "/soc/pcie at 2b000000"); /* &pcie0 */
+	fdt_setprop_string(fdt, offset, "status", "disabled");
+
+	offset = fdt_path_offset(fdt, "/soc/phy at 10210000"); /* &pciephy0 */
+	fdt_setprop_u32(fdt, offset, "starfive,sys-syscon", /* syscon */
+			fdt_get_phandle(fdt,
+					fdt_path_offset(fdt, "/soc/sys_syscon at 13030000")));
+	fdt_appendprop_u32(fdt, offset, "starfive,sys-syscon", 0x18); /* append reg offset */
+	fdt_setprop_u32(fdt, offset, "starfive,stg-syscon",
+			fdt_get_phandle(fdt, fdt_path_offset(fdt, "/soc/stg_syscon at 10240000")));
+	/* append reg offset */
+	fdt_appendprop_u32(fdt, offset, "starfive,stg-syscon", 0x148);
+	fdt_appendprop_u32(fdt, offset, "starfive,stg-syscon", 0x1f4);
+
+	offset = fdt_path_offset(fdt, "/soc/usb at 10100000/usb at 0"); /* usb_cdns3 */
+	phy_offset = fdt_path_offset(fdt, "/soc/phy at 10210000"); /* <&pciephy0> */
+	/* append <&pciephy0> */
+	fdt_appendprop_u32(fdt, offset, "phys", fdt_get_phandle(fdt, phy_offset));
+	fdt_setprop(fdt, offset, "phy-names", "cdns3,usb2-phy\0cdns3,usb3-phy",
+		    sizeof("cdns3,usb2-phy\0cdns3,usb3-phy"));
+}
+
 void spl_fdt_fixup_mars(void *fdt)
 {
 	static const char compat[] = "milkv,mars\0starfive,jh7110";
@@ -335,6 +398,9 @@ void spl_fdt_fixup_star64(void *fdt)
 				break;
 		}
 	}
+	spl_fdt_fixup_usb_host(fdt);
+	spl_fdt_fixup_usb_vbus_pin(fdt, 25);
+	spl_fdt_fixup_set_usb3(fdt);
 }
 
 void spl_perform_fixups(struct spl_image_info *spl_image)
-- 
2.17.1