[PATCH v4 0/6] FUSB302 USB-C controller support

[Soeren Moch]

Hi Sebastian,

On 30.08.24 20:22, Sebastian Reichel wrote:
> Hi,
>
> On ROCK 5B power is usually supplied via it's USB-C port. This port has the
> data lines connected to RK3588, VBUS connected to the input regulator and
> CC pins connected to FUSB302. FUSB302 is a USB-C controller, which can be
> accessed via I2C from RK3588. The USB-C controller is needed to figure out
> the USB-C cable orientation, but also to do USB PD communication. Thus it
> would be great to enable support for it in the operating system.
>
> But the USB-PD specification requires, that a device reacts to USB-PD messages
> send by the power-supply within around 5 seconds. If that does not happen the
> power-supply assumes, that the device does not support USB-PD. If a device
> later starts sending USB-PD messages it is considered an error, which is solved
> by doing a hard reset. A USB-PD hard reset means, that all supply voltages are
> removed for a short period of time. For boards, which are solely powered
> through their USB-C port, like the Radxa Rock 5B, this results in an machine
> reset. This is currently worked around by not describing the FUSB302 in the
> kernel DT, so nothing will ever speak USB-PD on the Rock 5B. This means
>
> 1. the USB-C port cannot be used at all
> 2. the board will be running via fallback supply, which provides limited
>     power capabilities
>
> In order to avoid the hard reset, this adds FUSB302 support to U-Boot, so
> that we react to the power-supply's queries in time. The code, which is
> originally from the Linux kernel, consists of two parts:
>
> 1. the tcpm state machine, which implements the Type C port manager state
>     machine as described in the USB PD specification
> 2. the fusb302 driver, which knows about specific registers
>
> Especially the first part has been heavily modified compared to the
> kernel, which makes use of multiple delayed works and threads. For this
> I used a priorly ported version from Rockchip, removed their hacks and
> any states not necessary in U-Boot (e.g. audio accessory support).
>
> This version has been tested on Radxa Rock 5B using the open source TF-A
> (patches recently got merged into master branch) using the following power
> supplies:
>
>   * non PD capable (reports 5V 0A)
>   * RavPower 90W (ok)
>   * UGREEN 100W (ok)
>   * Anker 45W (ok)
>   * RavPower PB (hard resets in U-Boot, but succeeds at some point,
>     I still need to investigate)
>
> Changes since PATCHv3:
>   * Rebase to latest master (57949a99b7bd)
>   * Rework autoprobing; tcpm_post_bind tries to check if a probe is needed
>     based on DT properties and then sets the DM_FLAG_PROBE_AFTER_BIND flag.
>     If this accidently increases boot time on some boards they are probably
>     missing a 'self-powered;' flag in their USB-C connector node.
>   * Rock 5B ft_board_setup(): check for CONFIG_TYPEC_FUSB302 instead of
>     CONFIG_MISC_INIT_R to reflect the above change
>   * Drop adding 'CONFIG_MISC_INIT_R' to rock5b-rk3588_defconfig because of
>     the reworked autoprobing
>   * Log an error message if tcpm_send_queued_message() exits early
>   * Add R-b for the rockchip specific changes from Kever Yang
>   * Increase the timeout in tcpm_pd_transmit(), which seems to be the issue
>     Sören Moch ran into. I could not really reproduce it. Please test if this
>     helps with your supply (and share the logs if it does not help). I noticed
>     this version has issues with an old PD capable powerbank I own. I'm still
>     looking into that but wanted to share a new version so that the other
>     changes can get reviewed.
Unfortunately I see the same problem as in v3: boot loop when powering
the board from my notebook (ThinkPad X1 Nano running Ubuntu 24.04.1 LTS),
see boot log below.

Patch version v2 is still running totally fine in the exact same setup
(patch series on top of u-boot 2024.07, same board, same cabling).

Unfortunately I currently have no access to the miniPC (Zotac ZBOX CI620)
I used as additional test platform before.

The boot log is unfortunately not very helpful. If you provide an additional
patch enabling more debug output, I'm happy to retest with that (v2
and/or v4).

Regards,
Soeren



Boot Log:

DDR 9fffbe1e78 cym 24/02/04-10:09:20,fwver: v1.16
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
Manufacturer ID:0xff
CH0 RX Vref:26.7%, TX Vref:21.8%,0.0%
CH1 RX Vref:27.5%, TX Vref:19.8%,0.0%
CH2 RX Vref:28.5%, TX Vref:20.8%,0.0%
CH3 RX Vref:29.3%, TX Vref:20.8%,0.0%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out

U-Boot SPL 2024.07-00006-g65a73892d9 (Aug 31 2024 - 13:45:46 +0200)
Trying to boot from MMC2
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ... sha256+ OK
## Checking hash(es) for Image u-boot ... sha256+ OK
## Checking hash(es) for Image fdt-1 ... sha256+ OK
## Checking hash(es) for Image atf-2 ... sha256+ OK
## Checking hash(es) for Image atf-3 ... sha256+ OK
INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-682-g4ca8a8422:derrick.huang, fwver: v1.45
NOTICE:  BL31: Built : 10:11:21, Dec 27 2023
INFO:    spec: 0x1
INFO:    code: 0x88
INFO:    ext 32k is not valid
INFO:    ddr: stride-en 4CH
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    valid_cpu_msk=0xff bcore0_rst = 0x0, bcore1_rst = 0x0
INFO:    l3 cache partition cfg-0
INFO:    system boots from cpu-hwid-0
INFO:    disable memory repair
INFO:    idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO:    dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO:    dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO:    dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO:    dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO:    BL31: Initialising Exception Handling Framework
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without
OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0xa00000
INFO:    SPSR = 0x3c9


U-Boot 2024.07-00006-g65a73892d9 (Aug 31 2024 - 13:45:46 +0200)

Model: Radxa ROCK 5 Model B
DRAM:  8 GiB
DDR 9fffbe1e78 cym 24/02/04-10:09:20,fwver: v1.16
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
Manufacturer ID:0xff
CH0 RX Vref:26.7%, TX Vref:21.8%,0.0%
CH1 RX Vref:27.5%, TX Vref:19.8%,0.0%
CH2 RX Vref:28.5%, TX Vref:20.8%,0.0%
CH3 RX Vref:30.1%, TX Vref:19.8%,0.0%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out

U-Boot SPL 2024.07-00006-g65a73892d9 (Aug 31 2024 - 13:45:46 +0200)
Trying to boot from MMC2
...