[PATCH 06/11] rockchip: rk3288-firefly: Include sdmmc regulator in SPL

[Jonas Karlman]

Add bootph props and enable related Kconfig options to include the sdmmc
regulator in SPL. Also enable SPL_DM_SEQ_ALIAS to ensure aliases is
handled correctly in SPL.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
 arch/arm/dts/rk3288-firefly-u-boot.dtsi | 5 +++++
 configs/firefly-rk3288_defconfig        | 4 +++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi
index 435a02acea5d..f953f6821326 100644
--- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi
@@ -52,6 +52,7 @@
 
 &gpio7 {
 	/delete-property/ bootph-all;
+	bootph-pre-ram;
 };
 
 &pcfg_pull_none {
@@ -109,3 +110,7 @@
 	bootph-pre-sram;
 	bootph-pre-ram;
 };
+
+&vcc_sd {
+	bootph-pre-ram;
+};
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 862a17c84e07..2160474fe0f3 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -4,6 +4,7 @@ CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
 CONFIG_SYS_ARCH_TIMER=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_TEXT_BASE=0x01000000
+CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
@@ -41,6 +42,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -62,10 +64,10 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
-- 
2.47.1