[resend v2 00/19] Add Cadence NAND Driver support

Maniyam, Dinesh dinesh.maniyam at intel.com
Tue Dec 17 08:40:34 CET 2024



> -----Original Message-----
> From: Michael Nazzareno Trimarchi <michael at amarulasolutions.com>
> Sent: Friday, 13 December 2024 5:16 pm
> To: Maniyam, Dinesh <dinesh.maniyam at intel.com>
> Cc: u-boot at lists.denx.de; Marek <marex at denx.de>; Simon
> <simon.k.r.goldschmidt at gmail.com>; Tom Rini <trini at konsulko.com>; Dario
> Binacchi <dario.binacchi at amarulasolutions.com>; Johan Jonker
> <jbx6244 at gmail.com>; Michal Simek <michal.simek at amd.com>; Arseniy
> Krasnov <avkrasnov at salutedevices.com>; Alexander Dahl <ada at thorsis.com>;
> William Zhang <william.zhang at broadcom.com>; Igor Prusov
> <ivprusov at salutedevices.com>; Meng, Tingting <tingting.meng at intel.com>;
> Chee, Tien Fong <tien.fong.chee at intel.com>; Hea, Kok Kiang
> <kok.kiang.hea at intel.com>; Ng, Boon Khai <boon.khai.ng at intel.com>; Yuslaimi,
> Alif Zakuan <alif.zakuan.yuslaimi at intel.com>; Zamri, Muhammad Hazim Izzat
> <muhammad.hazim.izzat.zamri at intel.com>; Lim, Jit Loon
> <jit.loon.lim at intel.com>; Tang, Sieu Mun <sieu.mun.tang at intel.com>
> Subject: Re: [resend v2 00/19] Add Cadence NAND Driver support
> 
> Hi
> 
> On Thu, Dec 5, 2024 at 10:23 AM <dinesh.maniyam at intel.com> wrote:
> >
> > From: Dinesh Maniyam <dinesh.maniyam at intel.com>
> >
> > This patchset add Cadence NAND driver support for Intel Agilex5
> > devices.
> >
> > The NAND driver is leveraged from the cadence-nand-controller.c from
> > Linux version 6.11.2. U-Boot will support read, write and erase NAND
> > with Cadence driver. The driver further enhanced in U-Boot to support
> > NAND booting from FSBL and support boot to kernel via UBIFS.
> >
> > Patch status:
> > Have changes: All patches expect Patch 19
> >
> > Detail changelog can find in commit message.
> >
> > v1->v2:
> > --------
> > Patch 1 - 18:
> >
> > - remove the "this patch is to" commit phrases
> >
> > Patch 4;
> > - minor refactoring of code to match the stable version 6.11.2.
> >
> > Patch 14:
> > - Add maintainer and "#include" mechanism for new variant
> >
> > Patch 16:
> > - leverage the existing nand_spl_load_image
> >
> 
> I have tried to build but it does not work. Have you tested in github?
> 
> Michael

Yet to deploy github test on our current platform. 
Only checkpatch.pl and local built has been used as a metric for each commit before submission.
And, all these commits are part of the firmware currently running on real hardware.

> 
> > History:
> > --------
> > [v1]:
> > https://patchwork.ozlabs.org/project/uboot/cover/20240919035512.13854-
> > 1-dinesh.maniyam at intel.com/
> >
> > Dinesh Maniyam (19):
> >   dt: nand: add cadence nand dt-bindings
> >   arm: dts: agilex5: Enabled cdns-nand dts setting
> >   include: asm: Add support to read/write 64-bit
> >   drivers: mtd: nand: Add driver for Cadence Nand
> >   drivers: mtd: nand: cadence: Add support for read status command
> >   drivers: mtd: nand: cadence: Add support for readid command
> >   drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM
> >   drivers: mtd: nand: cadence: Add support for NAND_CMD_RESET
> >   drivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES
> >   drivers: mtd: nand: cadence: Flush & invalidate dma descriptor
> >   drivers: mtd: nand: cadence: Poll for desc complete status
> >   drivers: mtd: nand: cadence: Use bounce buffer
> >   drivers: nand: Enabled Kconfig and Makefile for cdns-nand
> >   configs: nand2_defconfig: Enable configs for nand boot
> >   drivers: mtd: nand: base: Add support for Hardware ECC for check bad
> >     block
> >   drivers: mtd: nand: spl: Add support for nand SPL load image
> >   drivers: mtd: nand: Enabled Kconfig and Makefile for Cadence-SPL
> >   drivers: mtd: nand: Kconfig: Remove SYS_NAND_BLOCK_SIZE dependency
> >   drivers: mtd: nand: Kconfig: Enabled self-init for cdns-nand SPL
> >
> >  arch/arm/dts/socfpga_agilex5.dtsi             |   14 +
> >  .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi |   28 +
> >  arch/arm/include/asm/io.h                     |   25 +
> >  board/intel/agilex5-socdk/MAINTAINERS         |    2 +
> >  configs/socfpga_agilex5_nand2_defconfig       |   33 +
> >  .../mtd/cadence,nand.yaml                     |   98 +
> >  drivers/mtd/nand/raw/Kconfig                  |   19 +-
> >  drivers/mtd/nand/raw/Makefile                 |    2 +
> >  drivers/mtd/nand/raw/cadence_nand.c           | 2424 +++++++++++++++++
> >  drivers/mtd/nand/raw/cadence_spl.c            |   59 +
> >  drivers/mtd/nand/raw/nand_base.c              |   71 +-
> >  include/cadence-nand.h                        |  529 ++++
> >  include/linux/mtd/rawnand.h                   |   14 +
> >  13 files changed, 3293 insertions(+), 25 deletions(-)  create mode
> > 100644 configs/socfpga_agilex5_nand2_defconfig
> >  create mode 100644 doc/device-tree-bindings/mtd/cadence,nand.yaml
> >  create mode 100644 drivers/mtd/nand/raw/cadence_nand.c
> >  create mode 100644 drivers/mtd/nand/raw/cadence_spl.c
> >  create mode 100644 include/cadence-nand.h
> >
> > --
> > 2.19.0
> >
> 
> 
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> michael at amarulasolutions.com
> __________________________________
> 
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