[PATCH v3 03/36] mmc: msm_sdhci: use modern clock handling

[Sumit Garg]

On Tue, 30 Jan 2024 at 19:35, Caleb Connolly <caleb.connolly at linaro.org> wrote:
>
> Use the clk_* helper functions and the correct property name for clocks.

This still doesn't handle fixed clocks like in case of QCS404, upstream DT says:

                sdcc1: mmc at 7804000 {
                        compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
                        ...
                        clocks = <&gcc GCC_SDCC1_AHB_CLK>,
                                 <&gcc GCC_SDCC1_APPS_CLK>,
                                 <&xo_board>;
                        clock-names = "iface", "core", "xo";
                        ...
                };

Due to that "xo" fixed clock we get:

MMC:   clk_set_rate(clk=00000000ffaf7348, rate=19200000)
Unknown clock id 0
clk_set_rate(clk=00000000ffaf7598, rate=19200000)
Unknown clock id 0
clk_set_rate(clk=00000000ffb08868, rate=400000)
mmc at 7804000: 0

-Sumit

>
> Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
> Signed-off-by: Caleb Connolly <caleb.connolly at linaro.org>
> ---
>  drivers/mmc/msm_sdhci.c | 69 ++++++++++++++++++++++++++++++++-----------------
>  1 file changed, 46 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
> index 604f9c3ff99c..863e6007a905 100644
> --- a/drivers/mmc/msm_sdhci.c
> +++ b/drivers/mmc/msm_sdhci.c
> @@ -44,6 +44,7 @@ struct msm_sdhc_plat {
>  struct msm_sdhc {
>         struct sdhci_host host;
>         void *base;
> +       struct clk_bulk clks;
>  };
>
>  struct msm_sdhc_variant_info {
> @@ -54,36 +55,56 @@ DECLARE_GLOBAL_DATA_PTR;
>
>  static int msm_sdc_clk_init(struct udevice *dev)
>  {
> -       int node = dev_of_offset(dev);
> -       uint clk_rate = fdtdec_get_uint(gd->fdt_blob, node, "clock-frequency",
> -                                       400000);
> -       uint clkd[2]; /* clk_id and clk_no */
> -       int clk_offset;
> -       struct udevice *clk_dev;
> -       struct clk clk;
> -       int ret;
> +       struct msm_sdhc *prv = dev_get_priv(dev);
> +       ofnode node = dev_ofnode(dev);
> +       uint clk_rate;
> +       int ret, i = 0, n_clks;
> +       const char *clk_name;
>
> -       ret = fdtdec_get_int_array(gd->fdt_blob, node, "clock", clkd, 2);
> +       ret = ofnode_read_u32(node, "clock-frequency", &clk_rate);
>         if (ret)
> -               return ret;
> +               clk_rate = 400000;
>
> -       clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);
> -       if (clk_offset < 0)
> -               return clk_offset;
> -
> -       ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk_dev);
> -       if (ret)
> +       ret = clk_get_bulk(dev, &prv->clks);
> +       if (ret) {
> +               debug("Couldn't get mmc clocks: %d\n", ret);
>                 return ret;
> +       }
>
> -       clk.id = clkd[1];
> -       ret = clk_request(clk_dev, &clk);
> -       if (ret < 0)
> +       ret = clk_enable_bulk(&prv->clks);
> +       if (ret) {
> +               debug("Couldn't enable mmc clocks: %d\n", ret);
>                 return ret;
> +       }
>
> -       ret = clk_set_rate(&clk, clk_rate);
> -       clk_free(&clk);
> -       if (ret < 0)
> -               return ret;
> +       /* If clock-names is unspecified, then the first clock is the core clock */
> +       if (!ofnode_get_property(node, "clock-names", &n_clks)) {
> +               if (!clk_set_rate(&prv->clks.clks[0], clk_rate)) {
> +                       printf("Couldn't set core clock rate: %d\n", ret);
> +                       return -EINVAL;
> +               }
> +       }
> +
> +       /* Find the index of the "core" clock */
> +       while (i < n_clks) {
> +               ofnode_read_string_index(node, "clock-names", i, &clk_name);
> +               if (!strcmp(clk_name, "core"))
> +                       break;
> +               i++;
> +       }
> +
> +       if (i >= prv->clks.count) {
> +               printf("Couldn't find core clock (index %d but only have %d clocks)\n", i,
> +                      prv->clks.count);
> +               return -EINVAL;
> +       }
> +
> +       /* The clock is already enabled by the clk_bulk above */
> +       ret = clk_set_rate(&prv->clks.clks[i], clk_rate);
> +       if (!ret) {
> +               printf("Couldn't set core clock rate: %d\n", ret);
> +               return -EINVAL;
> +       }
>
>         return 0;
>  }
> @@ -188,6 +209,8 @@ static int msm_sdc_remove(struct udevice *dev)
>         if (!var_info->mci_removed)
>                 writel(0, priv->base + SDCC_MCI_HC_MODE);
>
> +       clk_release_bulk(&priv->clks);
> +
>         return 0;
>  }
>
>
> --
> 2.43.0
>