[PATCH] board: rockchip: Add Pine64 PineTab2
Jonas Karlman
jonas at kwiboo.se
Mon Feb 5 14:48:16 CET 2024
Hi Kever,
On 2024-02-05 08:04, Kever Yang wrote:
> Hi Jonas,
>
> On 2024/2/5 01:30, Jonas Karlman wrote:
>> The Pine64 PineTab2 is a tablet computer based on the Rockchip RK3566
>> SoC. The table features 4/8 GB LPDDR4 RAM and 64/128 GB eMMC storage.
>>
>> Features tested on a Pine64 PineTab2 8GB v2.0:
>> - SD-card boot
>> - eMMC boot
>> - SPI Flash boot
>> - USB host
>>
>> Device tree is imported from linux maintainer branch v6.9-armsoc/dts64,
>> commit 1b7e19448f8f ("arm64: dts: rockchip: Add devicetree for Pine64
>> PineTab2").
>>
>> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
>> ---
>> This patch depend on the series "rockchip: rk35xx: Sync device tree with
>> linux v6.8-rc1" [1].
>>
>> [1] https://patchwork.ozlabs.org/cover/1891669/
>> ---
>> arch/arm/dts/Makefile | 2 +
>> arch/arm/dts/rk3566-pinetab2-u-boot.dtsi | 44 +
>> arch/arm/dts/rk3566-pinetab2-v0.1-u-boot.dtsi | 3 +
>> arch/arm/dts/rk3566-pinetab2-v0.1.dts | 28 +
>
> Does this v0.1 version dts really needed? This seems like a test version
> instead of release version hardware?
The initial v0.1 was sent out to community developers and v2.0 is the
production version sold, so both versions exists in the wild.
In current state they could probably share a single DT for U-Boot usage
but in future if panel support is added to U-Boot the two versions does
differ a little bit.
Was safer to just include both device trees.
Regards,
Jonas
>
>
> Thanks,
>
> - Kever
>
>> arch/arm/dts/rk3566-pinetab2-v2.0-u-boot.dtsi | 3 +
>> arch/arm/dts/rk3566-pinetab2-v2.0.dts | 48 +
>> arch/arm/dts/rk3566-pinetab2.dtsi | 943 ++++++++++++++++++
>> board/pine64/quartz64_rk3566/MAINTAINERS | 11 +
>> configs/pinetab2-rk3566_defconfig | 119 +++
>> doc/board/rockchip/rockchip.rst | 1 +
>> 10 files changed, 1202 insertions(+)
>> create mode 100644 arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
>> create mode 100644 arch/arm/dts/rk3566-pinetab2-v0.1-u-boot.dtsi
>> create mode 100644 arch/arm/dts/rk3566-pinetab2-v0.1.dts
>> create mode 100644 arch/arm/dts/rk3566-pinetab2-v2.0-u-boot.dtsi
>> create mode 100644 arch/arm/dts/rk3566-pinetab2-v2.0.dts
>> create mode 100644 arch/arm/dts/rk3566-pinetab2.dtsi
>> create mode 100644 configs/pinetab2-rk3566_defconfig
>>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index 50f35e3db3f0..825fa1cd368a 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -173,6 +173,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
>>
>> dtb-$(CONFIG_ROCKCHIP_RK3568) += \
>> rk3566-anbernic-rgxx3.dtb \
>> + rk3566-pinetab2-v0.1.dtb \
>> + rk3566-pinetab2-v2.0.dtb \
>> rk3566-quartz64-a.dtb \
>> rk3566-quartz64-b.dtb \
>> rk3566-radxa-cm3-io.dtb \
>> diff --git a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
>> new file mode 100644
>> index 000000000000..4aa6ab1c848c
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
>> @@ -0,0 +1,44 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +
>> +#include "rk356x-u-boot.dtsi"
>> +
>> +&fspi_dual_io_pins {
>> + bootph-all;
>> +};
>> +
>> +&gpio0 {
>> + bootph-all;
>> +};
>> +
>> +&i2c0 {
>> + bootph-pre-ram;
>> +};
>> +
>> +&rk817 {
>> + bootph-pre-ram;
>> +
>> + regulators {
>> + bootph-pre-ram;
>> + };
>> +};
>> +
>> +&sdhci {
>> + cap-mmc-highspeed;
>> +};
>> +
>> +&sdmmc_pwren_l {
>> + bootph-all;
>> +};
>> +
>> +&sfc {
>> + bootph-pre-ram;
>> + u-boot,spl-sfc-no-dma;
>> +
>> + flash at 0 {
>> + bootph-pre-ram;
>> + };
>> +};
>> +
>> +&vcc3v3_sd {
>> + bootph-pre-ram;
>> +};
>> diff --git a/arch/arm/dts/rk3566-pinetab2-v0.1-u-boot.dtsi b/arch/arm/dts/rk3566-pinetab2-v0.1-u-boot.dtsi
>> new file mode 100644
>> index 000000000000..061dc3c2c375
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3566-pinetab2-v0.1-u-boot.dtsi
>> @@ -0,0 +1,3 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +
>> +#include "rk3566-pinetab2-u-boot.dtsi"
>> diff --git a/arch/arm/dts/rk3566-pinetab2-v0.1.dts b/arch/arm/dts/rk3566-pinetab2-v0.1.dts
>> new file mode 100644
>> index 000000000000..5fe6ca5da9d3
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3566-pinetab2-v0.1.dts
>> @@ -0,0 +1,28 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +
>> +/dts-v1/;
>> +
>> +#include "rk3566-pinetab2.dtsi"
>> +
>> +/ {
>> + model = "Pine64 PineTab2 v0.1";
>> + compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2", "rockchip,rk3566";
>> +};
>> +
>> +&lcd {
>> + reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
>> +};
>> +
>> +&pinctrl {
>> + lcd0 {
>> + lcd0_rst_l: lcd0-rst-l {
>> + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> + };
>> +};
>> +
>> +&sdmmc1 {
>> + vmmc-supply = <&vcc3v3_sys>;
>> +};
>> diff --git a/arch/arm/dts/rk3566-pinetab2-v2.0-u-boot.dtsi b/arch/arm/dts/rk3566-pinetab2-v2.0-u-boot.dtsi
>> new file mode 100644
>> index 000000000000..061dc3c2c375
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3566-pinetab2-v2.0-u-boot.dtsi
>> @@ -0,0 +1,3 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +
>> +#include "rk3566-pinetab2-u-boot.dtsi"
>> diff --git a/arch/arm/dts/rk3566-pinetab2-v2.0.dts b/arch/arm/dts/rk3566-pinetab2-v2.0.dts
>> new file mode 100644
>> index 000000000000..9349541cbbd0
>> --- /dev/null
>> +++ b/arch/arm/dts/rk3566-pinetab2-v2.0.dts
>> @@ -0,0 +1,48 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +
>> +/dts-v1/;
>> +
>> +#include "rk3566-pinetab2.dtsi"
>> +
>> +/ {
>> + model = "Pine64 PineTab2 v2.0";
>> + compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2", "rockchip,rk3566";
>> +};
>> +
>> +&gpio_keys {
>> + pinctrl-0 = <&kb_id_det>, <&hall_int_l>;
>> +
>> + event-hall-sensor {
>> + debounce-interval = <20>;
>> + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
>> + label = "Hall Sensor";
>> + linux,code = <SW_LID>;
>> + linux,input-type = <EV_SW>;
>> + wakeup-event-action = <EV_ACT_DEASSERTED>;
>> + wakeup-source;
>> + };
>> +};
>> +
>> +&lcd {
>> + reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>;
>> +};
>> +
>> +&pinctrl {
>> + lcd0 {
>> + lcd0_rst_l: lcd0-rst-l {
>> + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> + };
>> +
>> + hall {
>> + hall_int_l: hall-int-l {
>> + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> + };
>> +};
>> +
>> +&sdmmc1 {
>> + vmmc-supply = <&vcc_sys>;
>> +};
[snip]
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