[PATCH 4/7] imx8mp: power-domain: Expose high performance PLL clock

[Marek Vasut]

On 2/21/24 07:14, Sumit Garg wrote:
> On Tue, 20 Feb 2024 at 21:02, Marek Vasut <marex at denx.de> wrote:
>>
>> On 2/20/24 14:10, Sumit Garg wrote:
>>> PCIe PHY can use it when there is no external refclock provided.
>>
>> Commit message needs to be fixed.
> 
> How about the following?
> 
>      Expose high performance PLL clock, so the PCIe PHY can
>      use it when there is no external refclock provided.

If this code is imported from Linux
2cbee26e5d59 ("soc: imx: imx8mp-blk-ctrl: expose high performance PLL 
clock")
then just include that reference too .

[...]

>>> @@ -69,16 +127,23 @@ static int imx8mp_hsiomix_on(struct power_domain *power_domain)
>>>        if (ret)
>>>                goto err_clk_pcie;
>>>
>>> -     if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
>>> +     if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) {
>>>                setbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN);
>>> -     else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE)
>>> +     } else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE) {
>>>                setbits_le32(priv->base + GPR_REG0, PCIE_CLOCK_MODULE_EN);
>>> -     else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE_PHY)
>>> +     } else if (power_domain->id == IMX8MP_HSIOBLK_PD_PCIE_PHY) {
>>>                setbits_le32(priv->base + GPR_REG0, PCIE_PHY_APB_RST |
>>>                                                    PCIE_PHY_INIT_RST);
>>>
>>> +             ret = hsio_pll_enable(dev);
>>
>> Is this how Linux handles this PLL ?
>>
>> Seems like this should be either syscon or clock driver .
> 
> It isn't similar to what Linux does but I can't find suitable
> infrastructure in U-Boot to expose it as a regular clock. Are there
> any APIs available similar to devm_of_clk_add_hw_provider() in Linux?

Have a look at the very end of:

drivers/clk/renesas/clk-rcar-gen3.c

that registers clock and reset drivers for the same IP at the same 
address. In this case, you would register power domain and clock drivers 
instead .