[PATCH v2 0/1] Agilex5 enablement

[Jit Loon Lim]

V1: https://patchwork.ozlabs.org/project/uboot/patch/20240220143603.22091-1-jit.loon.lim@intel.com/
V2: Fixed Git auto-merge causing misalignment of code and insert/delete

Jit Loon Lim (1):
  arch:arm: Agilex5 enablement

 arch/arm/Kconfig                              |  13 +-
 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/socfpga_agilex5-u-boot.dtsi      | 458 ++++++++++++
 arch/arm/dts/socfpga_agilex5.dtsi             | 654 ++++++++++++++++++
 .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 144 ++++
 arch/arm/dts/socfpga_agilex5_socdk.dts        | 163 +++++
 arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi    |  38 +-
 arch/arm/mach-socfpga/Kconfig                 |  69 +-
 arch/arm/mach-socfpga/Makefile                |   4 +-
 arch/arm/mach-socfpga/board.c                 |  56 +-
 .../include/mach/base_addr_soc64.h            |  44 +-
 board/intel/agilex5-socdk/MAINTAINERS         |   8 +
 board/intel/agilex5-socdk/Makefile            |   7 +
 configs/socfpga_agilex5_defconfig             | 113 +++
 include/configs/socfpga_agilex5_socdk.h       |  12 +
 include/configs/socfpga_soc64_common.h        | 209 +++++-
 16 files changed, 1957 insertions(+), 36 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_agilex5-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
 create mode 100644 board/intel/agilex5-socdk/MAINTAINERS
 create mode 100644 board/intel/agilex5-socdk/Makefile
 create mode 100644 configs/socfpga_agilex5_defconfig
 create mode 100644 include/configs/socfpga_agilex5_socdk.h

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2.26.2