[PATCH] arm64: zynqmp: Add label to pmu fwnode
Michal Simek
michal.simek at amd.com
Tue Feb 27 09:45:13 CET 2024
On 2/27/24 09:40, lukas.funke-oss at weidmueller.com wrote:
> From: Lukas Funke <lukas.funke at weidmueller.com>
>
> Some zynqmp SoCs (the cg series) only have two cpus. Thus, for some
> cases the cpu-affinity has to adapted, because cpu3 and cpu4 are
interrupt-affinity right?
> missing. By adding a label to the pmu fwnode the cpu affinity can
> be adapted in a device specific dt.
Why do you need to do it? What problem do you have if you don't change it?
It shouldn't be different compare to max_cpus=2 right?
>
> Signed-off-by: Lukas Funke <lukas.funke at weidmueller.com>
> ---
> arch/arm/dts/zynqmp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> index b50b83b772..457f8e394f 100644
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ b/arch/arm/dts/zynqmp.dtsi
> @@ -168,7 +168,7 @@
> bootph-all;
> };
>
> - pmu {
> + pmu: pmu {
> compatible = "arm,armv8-pmuv3";
> interrupt-parent = <&gic>;
> interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
And I actually prefer to have labels for all nodes to be able to reference it.
That's why patch itself is good.
Thanks,
Michal
More information about the U-Boot
mailing list