[PATCH 0/2] arm: dts: Add Itap Delay Value For High Speed DDR

[Bryan Brattlof]

Hi Bhavya!

On January  8, 2024 thus sayeth Bhavya Kapoor:
> This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
> J7200 SoC and for DDR50 speed mode for MMCSD in J721s2 SoC.
> 
> Bhavya Kapoor (2):
>   arm: dts: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode
>   arm: dts: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode
> 
>  arch/arm/dts/k3-j7200-main.dtsi  | 1 +
>  arch/arm/dts/k3-j721s2-main.dtsi | 1 +

Because of the periodic syncs with the kernel, modifying these dt files 
in U-Boot will cause confusion. (Which node is correct why did we have 
to do this in U-Boot and not in the Kernel... bla bla bla) If they 
absolutely need to go in now please override these nodes in the 
*-u-boot.dtsi files with a comment so we can keep track of these changes 
during the next sync with Linux.

~Bryan