[PATCH] arm64: xilinx: Move address/size-cells to proper locations

[Krzysztof Kozlowski]

On 11/01/2024 09:10, Michal Simek wrote:
> 
> 
> On 1/11/24 08:56, Krzysztof Kozlowski wrote:
>> On 11/01/2024 08:09, Michal Simek wrote:
>>>
>>>
>>> On 1/10/24 22:27, Krzysztof Kozlowski wrote:
>>>> On 10/01/2024 14:35, Michal Simek wrote:
>>>>> Move cells to board dtsi files from generic zynqmp.dtsi. Changes are
>>>>> related to qspi, spi, nand, i2c and ethernet nodes.
>>>>>
>>>>> All errors are generated when dtbs are compiled with W=1.
>>>>>
>>>>
>>>> I don't see any errors on some other platforms, like Samsung. Isn't the
>>>> actual problem that you do not disable the nodes (I2C, SPI etc) in DTSI?
>>>
>>> On i2c node. Bus is present on the board but it can end in a connector or device
>>> which we don't have OS/bootloader drivers for. But we have drivers using i2c
>>> tools or u-boot i2c probe. It means that transition should happen.
>>> On i2c interesting is that W=1 is not able to report issues when you have i2c
>>> mux described like this
>>>
>>>                   i2c at 0 {
>>>                           #address-cells = <1>;
>>>                           #size-cells = <0>;
>>>                           reg = <0>;
>>>                           /* HPC0_IIC */
>>
>> I understand and it is quite common, but it does not explain the case.
>> Your bus should still be disabled in DTSI and enabled in DTS for these
>> cases.
>>
>> And how exactly do you solve the warning for above case?
> 
> I had address/size-cells in dtsi (entire SoC) and then just enabled the whole 
> i2c bus(for above reason) in board dts file without any childs there.
> Then W=1 reported that there are address/size-cells without child.
> 
> Another way how to solve it would be to simply delete address/size cells in 
> these cases.

But your device without children sill have address/size cells, doesn't
it? Or does it mean you did not add it to such cases?

Anyway, I have exactly the same case exynos5800-peach-pi.dts with i2c_2
and no W=1 warnings. I really do not think your solution is correct.

Also, address/size cells are properties of the SoC, so rather DTSI.

Best regards,
Krzysztof