[PATCH v2] rockchip: spl: Enable caches to speed up checksum validation

[Jonas Karlman]

FIT checksum validation is very slow in SPL due to D-cache not being
enabled.

Enable caches in SPL to speed up FIT checksum validation, from seconds
to milliseconds.

This change enables caches in SPL on all Rockchip boards, the Kconfig
options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be enabled to
disable caches for a specific board or SoC if needed.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
Changes in v2:
- None

This has been tested on multiple RK3288, RK3328, RK3399, RK356x and
RK3588 boards without any issues, vendor U-Boot also enables caches in
SPL for all SoCs.

Link to RFC: https://patchwork.ozlabs.org/patch/1802303/
---
 arch/arm/mach-rockchip/spl.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 87280e2ba7cc..e29c841100c8 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -136,6 +136,10 @@ void board_init_f(ulong dummy)
 	}
 	gd->ram_top = gd->ram_base + get_effective_memsize();
 	gd->ram_top = board_get_usable_ram_top(gd->ram_size);
+	gd->relocaddr = gd->ram_top;
+
+	arch_reserve_mmu();
+	enable_caches();
 #endif
 	preloader_console_init();
 }
-- 
2.43.0