[PATCH v2] rockchip: spl: Enable caches to speed up checksum validation
Jonas Karlman
jonas at kwiboo.se
Tue Jan 23 11:16:17 CET 2024
Hi Kever,
On 2024-01-23 03:36, Kever Yang wrote:
> Hi Jonas,
>
> On 2024/1/23 02:16, Jonas Karlman wrote:
>> FIT checksum validation is very slow in SPL due to D-cache not being
>> enabled.
>>
>> Enable caches in SPL to speed up FIT checksum validation, from seconds
>> to milliseconds.
>>
>> This change enables caches in SPL on all Rockchip boards, the Kconfig
>> options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be enabled to
>> disable caches for a specific board or SoC if needed.
> It should invalidate cache before go to next stage, but the U-Boot
> proper and SPL
> are using different memory area and U-Boot calls cleanup_before_linux()
> at last,
> this patch should be safe in current code structure.
Thanks for input, since the commit 6826c432e351 ("spl: Jump to image at
end of board_init_r") the spl_board_prepare_for_boot() will be called
before next stage after SPL regardless of TF-A, OPTEE, linux or U-Boot
proper.
Sounds like I should add something like the following in v3, after some
re-testing to ensure all caches are disabled before next stage.
void spl_board_prepare_for_boot(void)
{
cleanup_before_linux();
}
Regards,
Jonas
>
> Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
>
> Thanks,
> - Kever
>
>>
>> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
>> ---
>> Changes in v2:
>> - None
>>
>> This has been tested on multiple RK3288, RK3328, RK3399, RK356x and
>> RK3588 boards without any issues, vendor U-Boot also enables caches in
>> SPL for all SoCs.
>>
>> Link to RFC: https://patchwork.ozlabs.org/patch/1802303/
>> ---
>> arch/arm/mach-rockchip/spl.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
>> index 87280e2ba7cc..e29c841100c8 100644
>> --- a/arch/arm/mach-rockchip/spl.c
>> +++ b/arch/arm/mach-rockchip/spl.c
>> @@ -136,6 +136,10 @@ void board_init_f(ulong dummy)
>> }
>> gd->ram_top = gd->ram_base + get_effective_memsize();
>> gd->ram_top = board_get_usable_ram_top(gd->ram_size);
>> + gd->relocaddr = gd->ram_top;
>> +
>> + arch_reserve_mmu();
>> + enable_caches();
>> #endif
>> preloader_console_init();
>> }
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