[GIT PULL] u-boot-riscv/master

[Leo Liang]

Hi Tom,

The following changes since commit 28760ce8640ff6266bd1c1c568a4a231576f3919:

  Merge tag 'clk-2024.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk (2024-01-30 07:54:28 -0500)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git 

for you to fetch changes up to 6882255ac3107c58e1153311df8a8270087f8cb3:

  riscv: dts: starfive: add regulator device (2024-01-31 16:52:53 +0800)

CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/19505
----------------------------------------------------------------

* Add RISC-V falcon mode documentation
* Add Clang build support
* Add cmd to detect Debug Trigger Extension support

* Add PWM setting for Unmatched board
* Add Milk-V Duo board support
* Add new device node and enable new config option for VisionFive2 board
* Add second virtio device for RISC-V QEMU

----------------------------------------------------------------
Aurelien Jarno (3):
      board: starfive: handle compatible property in dynamic DT configuration
      riscv: qemu: enable booting on a second virtio device
      configs: visionfive2: Disable ENV_IS_NOWHERE

Heinrich Schuchardt (1):
      cmd: sbi: add support for Debug Trigger Extension

Kongyang Liu (3):
      riscv: dts: sophgo: add basic device tree for Milk-V Duo board
      riscv: sophgo: milkv_duo: initial support added
      doc: sophgo: milkv_duo: document Milk-V Duo board

Lukasz Tekieli (2):
      net: phy: motorcomm: configure pad drive strength register
      board: visionfive2: configure PHY pad drive strength

Nam Cao (2):
      riscv: dts: jh7110: add power management unit controller node
      riscv: dts: starfive: add regulator device

Randolph (3):
      doc: falcon: riscv: Falcon Mode boot on RISC-V
      spl: riscv: falcon: move fdt blob to specified address
      configs: andes: add the fdt blob copy address for SPL

Vincent Chen (1):
      board: sifive: spl: Initialized the PWM setting in the SPL stage

kleines Filmröllchen (1):
      riscv: Support building with Clang

 arch/riscv/Kconfig                               |   4 +
 arch/riscv/config.mk                             |   2 +-
 arch/riscv/dts/Makefile                          |   1 +
 arch/riscv/dts/cv1800b-milkv-duo.dts             |  38 +++++
 arch/riscv/dts/cv1800b.dtsi                      |  18 +++
 arch/riscv/dts/cv18xx.dtsi                       | 192 +++++++++++++++++++++++
 arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi |   5 +
 arch/riscv/dts/jh7110.dtsi                       |   6 +
 arch/riscv/include/asm/arch-fu740/eeprom.h       |  15 ++
 arch/riscv/include/asm/sbi.h                     |   1 +
 board/AndesTech/ae350/ae350.c                    |  25 ---
 board/sifive/unmatched/spl.c                     |  52 ++++++
 board/sophgo/milkv_duo/Kconfig                   |  28 ++++
 board/sophgo/milkv_duo/MAINTAINERS               |   6 +
 board/sophgo/milkv_duo/Makefile                  |   5 +
 board/sophgo/milkv_duo/board.c                   |   9 ++
 board/starfive/visionfive2/spl.c                 |  12 ++
 cmd/riscv/sbi.c                                  |   1 +
 common/spl/Kconfig                               |   2 +-
 common/spl/spl_opensbi.c                         |  15 ++
 configs/ae350_rv32_falcon_defconfig              |   1 +
 configs/ae350_rv32_falcon_xip_defconfig          |   1 +
 configs/ae350_rv64_falcon_defconfig              |   1 +
 configs/ae350_rv64_falcon_xip_defconfig          |   1 +
 configs/milkv_duo_defconfig                      |  23 +++
 configs/starfive_visionfive2_defconfig           |   1 -
 doc/board/index.rst                              |   1 +
 doc/board/sophgo/index.rst                       |   8 +
 doc/board/sophgo/milkv_duo.rst                   |  64 ++++++++
 doc/develop/falcon.rst                           | 158 +++++++++++++++++++
 drivers/net/phy/motorcomm.c                      | 130 +++++++++++++++
 include/configs/milkv_duo.h                      |  12 ++
 include/configs/qemu-riscv.h                     |   1 +
 33 files changed, 811 insertions(+), 28 deletions(-)
 create mode 100644 arch/riscv/dts/cv1800b-milkv-duo.dts
 create mode 100644 arch/riscv/dts/cv1800b.dtsi
 create mode 100644 arch/riscv/dts/cv18xx.dtsi
 create mode 100644 arch/riscv/include/asm/arch-fu740/eeprom.h
 create mode 100644 board/sophgo/milkv_duo/Kconfig
 create mode 100644 board/sophgo/milkv_duo/MAINTAINERS
 create mode 100644 board/sophgo/milkv_duo/Makefile
 create mode 100644 board/sophgo/milkv_duo/board.c
 create mode 100644 configs/milkv_duo_defconfig
 create mode 100644 doc/board/sophgo/index.rst
 create mode 100644 doc/board/sophgo/milkv_duo.rst
 create mode 100644 include/configs/milkv_duo.h

 Best regards,
 Leo