回复: [PATCH v2 0/7] Add Starfive JH7110 Cadence USB driver

[Minda Chen]

> 
> On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt <xypron.glpk at gmx.de>
> wrote:
> >
> > On 7/4/24 07:50, Minda Chen wrote:
> > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > So the codes can be used in visionfive2 and star64 7110 board.
> > >
> > > The driver is almost the same with kernel driver.
> > >
> > > Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
> > > The code can work.
> > >
> > > - Star64 using USB 3.0 and USB 2.0 host must add below board dts setting.
> >
> > Does this mean a future patch for spl_fdt_fixup_star64() is needed?
> 
> As said by Hal they will be introducing a patchset to OF_UPSTREAM the
> JH7110 board support so we should pursue that first to get dts upstream (Linux?)
> aligned with U-Boot.
> 
> >
> > Did you also have a look at the USB on the Milk V Mars CM?
> 
> With Minda's advice for Star64 applied to jh7110-starfive-visionfive-2.dtsi
> directly as a test on Milk-V Mars CM
> Lite:
> 
> StarFive # usb info
> 1: Hub,  USB Revision 3.0
>  - U-Boot XHCI Host Controller
>  - Class: Hub
>  - PacketSize: 512  Configurations: 1
>  - Vendor: 0x0000  Product 0x0000 Version 1.0
>    Configuration: 1
>    - Interfaces: 1 Self Powered 0mA
>      Interface: 0
>      - Alternate Setting 0, Endpoints: 1
>      - Class Hub
>      - Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
> 
> >
> > Best regards
> >
> > Heinrich
> >
> > >
> > > 1. usb pin setting
> > >       usb_pins: usb0-0 {
> > >               driver-vbus-pin {
> > >                       pinmux = <GPIOMUX(25,
> GPOUT_SYS_USB_DRIVE_VBUS,
> > >                                         GPOEN_ENABLE,
> > >                                         GPI_NONE)>;
> > >                       bias-disable;
> > >                       input-disable;
> > >                       input-schmitt-disable;
> > >                       slew-rate = <0>;
> > >               };
> > >       };
> > >
> > > 2. related dts node setting.
> > > &pcie0 {
> > >       status = "disabled";
> > > };
> > >
> > > &pciephy0 {
> > >       starfive,sys-syscon = <&sys_syscon 0x18>;
> > >       starfive,stg-syscon = <&stg_syscon 0x148 0x1f4>;
> > >       status = "okay";
> > > };
> 
> Question I have is:   Where is the documentation for these "magical"
> numbers 0x18 00x148 0x1f4 ?  Is this a defined constant, or else where is this in
> the Technical Reference Manual?
> 
This is USB 3.0 configuration. 0x18 0x148 and 0x1f4 is register offset.
MilkV CM is USB 2.0 host.  It is not needed.
And I don't know whether Vbus pin is GPIO25 in CM board. If not, I think
Just set dr mode to host is OK in Milk-V CM board.
> > >
> > > &usb0 {
> > >       pinctrl-names = "default";
> > >       pinctrl-0 = <&usb_pins>;
> > >       status = "okay";
> > > };
> > >
> > > &usb_cdns3 {
> > >       phys = <&usbphy0>, <&pciephy0>;
> > >       phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
> > >       dr_mode = "host";
> > >       status = "okay";
> > > };
> > >
> > > - previous version
> > >    v1:
> > > https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.1960
> > > 0-1-minda.chen at starfivetech.com/
> > >
> > > - patch description.
> > >
> > > patch1: Add set phy mode function in cdns3 core driver
> > >          which is used by Starfive JH7110.
> > > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > > patch4: Cadence USB wrapper driver.
> > > patch5: Add JH7110 USB default overcurrent pin.
> > > patch6-8 dts, config and maintainers update.
> > >
> > > - change:
> > >       v2:
> > >       - patch 1 Move the added code to cdns3_core_init_role(). Must
> > >         set PHY mode before calling cdns3 role start function.
> > >       - patch 1-4 correct the code format.(follow Marek's comments.)
> > >       - patch 2 Add set 125M clock in PHY init function.
> > >       - Add new patch5.
> > >
> > > Minda Chen (8):
> > >    usb: cdns3: Set USB PHY mode in cdns3_core_init_role()
> > >    phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> > >    phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> > >    usb: cdns: starfive: Add cdns USB driver
> > >    pinctrl: starfive: Setup USB default disable overcurrent pin
> > >    configs: starfive: Add visionfive2 cadence USB configuration
> > >    dts: starfive: Add JH7110 Cadence USB dts node
> > >    MAINTAINERS: Update Starfive visionfive2 maintain files.
> > >
> > >   .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
> > >   arch/riscv/dts/jh7110.dtsi                    |  52 +++++
> > >   board/starfive/visionfive2/MAINTAINERS        |   2 +
> > >   configs/starfive_visionfive2_defconfig        |   9 +
> > >   drivers/phy/Kconfig                           |   1 +
> > >   drivers/phy/Makefile                          |   1 +
> > >   drivers/phy/starfive/Kconfig                  |  21 ++
> > >   drivers/phy/starfive/Makefile                 |   7 +
> > >   drivers/phy/starfive/phy-jh7110-pcie.c        | 202
> ++++++++++++++++++
> > >   drivers/phy/starfive/phy-jh7110-usb2.c        | 135 ++++++++++++
> > >   drivers/pinctrl/starfive/pinctrl-jh7110-sys.c |  11 +-
> > >   drivers/usb/cdns3/Kconfig                     |   7 +
> > >   drivers/usb/cdns3/Makefile                    |   2 +
> > >   drivers/usb/cdns3/cdns3-starfive.c            | 183
> ++++++++++++++++
> > >   drivers/usb/cdns3/core.c                      |  25 +++
> > >   15 files changed, 661 insertions(+), 2 deletions(-)
> > >   create mode 100644 drivers/phy/starfive/Kconfig
> > >   create mode 100644 drivers/phy/starfive/Makefile
> > >   create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
> > >   create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> > >   create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> > >
> > >
> > > base-commit: 8937bb265a7f2251c1bd999784a4ef10e9c6080d
> >
> 
> Thanks very much Minda, I am happy to see some USB Host function on
> Milk-V Mars CM Lite here.   -E Shattow