[PATCH 0/2] spi: sunxi: Improve the loading speed

Michael Walle mwalle at kernel.org
Fri Jul 12 20:11:05 CEST 2024


>> Right now, the maximal transfer speed from an SPI flash on a V3s is
>> about 240kb/s. That is pretty slow. It turns out, that due to an
>> error u-boot is setting the maximum frequency to 1MHz. By fixing
>> that another bug is unearthed: one cannot set a clock divider of 1:1
>> due to the handling between CDR1 and CDR2 handling. By fixing that
>> I achieved loading speeds of about 1.5MB/s.
> 
> Minor nit, should the clock fix go first so there's not a regression
> if someone needs to do a bisect on the first commit?

Sure can do for the next version.

-michael


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