[PATCH] clk: imx6q: Add definition for IMX6QDL_CLK_PWM1

Emil Kronborg emil.kronborg at protonmail.com
Fri Jul 12 16:19:25 CEST 2024


Enabling CONFIG_CMD_PWM, and consequently CONFIG_DM_PWM, causes the pwm
command to fail due to a missing clock.

    => pwm enable 0 0
    Enable clock-controller at 20c4000 failed
    Failed to enable per_clk
    pwm: '0' not found
    Command 'pwm' failed: Error -2

Note that it is trivial to also add the clocks for PWM2, PWM3, and PWM4.
However, I only tested PWM1 and thus only added the clock for that
signal.

Signed-off-by: Emil Kronborg <emil.kronborg at protonmail.com>
---
 drivers/clk/imx/clk-imx6q.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index ba9923d8f6fa..b057b30c621e 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -128,6 +128,8 @@ static int imx6q_clk_probe(struct udevice *dev)
 	       imx_clk_gate2("i2c1", "ipg_per", base + 0x70, 6));
 	clk_dm(IMX6QDL_CLK_I2C2,
 	       imx_clk_gate2("i2c2", "ipg_per", base + 0x70, 8));
+	clk_dm(IMX6QDL_CLK_PWM1,
+	       imx_clk_gate2("pwm1", "ipg_per", base + 0x78, 16));
 
 	clk_dm(IMX6QDL_CLK_ENET, imx_clk_gate2("enet", "ipg", base + 0x6c, 10));
 	clk_dm(IMX6QDL_CLK_ENET_REF,

base-commit: b4cbd1a257d4027038b4f997d73bdb0a066db045
-- 
2.45.2




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