[PATCH 4/4] phy: rockchip: snps-pcie3: Fix clearing PHP_GRF_PCIESEL_CON bits

[Kever Yang]

On 2024/7/15 05:23, Sebastian Kropatsch wrote:
> The pcie1ln_sel bits for the RK3588 are getting set but not cleared due
> to an incorrect write mask.
> Use a newly introduced constant for the write mask to fix this.
> Also introduce a GENMASK-based constant for PCIE30_PHY_MODE.
>
> This fix is adapted from the upstream Linux commit by Sebastian Reichel:
> 55491a5fa163 ("phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits")
>
> Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588")
> Signed-off-by: Sebastian Kropatsch <seb-dev at mail.de>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> index fadb77c25c..62b42d1805 100644
> --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> @@ -36,6 +36,8 @@
>   #define RK3588_BIFURCATION_LANE_0_1		BIT(0)
>   #define RK3588_BIFURCATION_LANE_2_3		BIT(1)
>   #define RK3588_LANE_AGGREGATION			BIT(2)
> +#define RK3588_PCIE1LN_SEL_EN			(GENMASK(1, 0) << 16)
> +#define RK3588_PCIE30_PHY_MODE_EN		(GENMASK(2, 0) << 16)
>   
>   /**
>    * struct rockchip_p3phy_priv - RK DW PCIe PHY state
> @@ -127,13 +129,13 @@ static int rockchip_p3phy_rk3588_init(struct phy *phy)
>   
>   	reg = mode;
>   	regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0,
> -		     (0x7 << 16) | reg);
> +		     RK3588_PCIE30_PHY_MODE_EN | reg);
>   
>   	/* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */
> -	reg = mode & 3;
> +	reg = mode & (RK3588_BIFURCATION_LANE_0_1 | RK3588_BIFURCATION_LANE_2_3);
>   	if (reg)
>   		regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON,
> -			     (reg << 16) | reg);
> +			     RK3588_PCIE1LN_SEL_EN | reg);
>   
>   	reset_deassert(&priv->p30phy);
>   	udelay(1);