[PATCH 2/3] rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support

[Kever Yang]

On 2024/7/4 20:53, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz at cherry.de>
>
> Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane
> PHY on RK3588.
>
> CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since
> it's required only for the M.2 E-KEY slot on the main PCB, but that is
> used typically for WiFi+BT modules, or on the mezzanine connector but
> the features exposed behind that connector aren't supported in U-Boot
> (no DT for it right now). However, if the PHY driver is missing, we get
> the following error message:
> pcie_dw_rockchip pcie at fe170000: failed to get pcie phy (ret=-19)
>
> and you would need to know which PCIe controller that is before deciding
> to ignore it. While after enabling the PHY driver, we are greeted with:
> pcie_dw_rockchip pcie at fe170000: PCIe-2 Link Fail
> which is a bit more acceptable (to me).
>
> The other option would be to disable the PCIe2 PHYs/controllers in the
> DT, which I'm not too fond of.
>
> Signed-off-by: Quentin Schulz <quentin.schulz at cherry.de>

Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   configs/jaguar-rk3588_defconfig | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig
> index 36bf34d97c8..18006467dde 100644
> --- a/configs/jaguar-rk3588_defconfig
> +++ b/configs/jaguar-rk3588_defconfig
> @@ -13,6 +13,7 @@ CONFIG_TARGET_JAGUAR_RK3588=y
>   CONFIG_DEBUG_UART_BASE=0xfeb50000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
>   CONFIG_DEBUG_UART=y
>   CONFIG_FIT=y
>   CONFIG_FIT_VERBOSE=y
> @@ -40,6 +41,7 @@ CONFIG_CMD_I2C=y
>   # CONFIG_CMD_LOADB is not set
>   # CONFIG_CMD_LOADS is not set
>   CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
>   # CONFIG_CMD_SF is not set
>   CONFIG_CMD_USB=y
>   # CONFIG_CMD_SETEXPR is not set
> @@ -88,7 +90,10 @@ CONFIG_PHY_MICREL=y
>   CONFIG_PHY_MICREL_KSZ90X1=y
>   CONFIG_DWC_ETH_QOS=y
>   CONFIG_DWC_ETH_QOS_ROCKCHIP=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>   CONFIG_SPL_PINCTRL=y
>   CONFIG_DM_PMIC=y
>   CONFIG_PMIC_RK8XX=y
>