[PATCH 01/14] rockchip: Move the default timer init to a common file
Dragan Simic
dsimic at manjaro.org
Sat Jul 20 08:33:14 CEST 2024
Hello Simon,
On 2024-07-20 08:16, Simon Glass wrote:
> Rather than repeating the same code in two files (SPL and TPL), move it
> to a shared filed.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
Looking good to me. Thanks for the patch.
Reviewed-by: Dragan Simic <dsimic at manjaro.org>
> ---
>
> arch/arm/include/asm/arch-rockchip/timer.h | 3 ++
> arch/arm/mach-rockchip/Makefile | 4 +--
> arch/arm/mach-rockchip/spl.c | 21 +------------
> arch/arm/mach-rockchip/spl_common.c | 36 ++++++++++++++++++++++
> arch/arm/mach-rockchip/tpl.c | 30 +-----------------
> 5 files changed, 43 insertions(+), 51 deletions(-)
> create mode 100644 arch/arm/mach-rockchip/spl_common.c
>
> diff --git a/arch/arm/include/asm/arch-rockchip/timer.h
> b/arch/arm/include/asm/arch-rockchip/timer.h
> index 77b54220447..b5fc738c98c 100644
> --- a/arch/arm/include/asm/arch-rockchip/timer.h
> +++ b/arch/arm/include/asm/arch-rockchip/timer.h
> @@ -15,4 +15,7 @@ struct rk_timer {
> u32 timer_int_status;
> };
>
> +/** rockchip_stimer_init() - Set up the timer ready for use */
> +void rockchip_stimer_init(void);
> +
> #endif
> diff --git a/arch/arm/mach-rockchip/Makefile
> b/arch/arm/mach-rockchip/Makefile
> index c07bdaee4c3..3b13891ec24 100644
> --- a/arch/arm/mach-rockchip/Makefile
> +++ b/arch/arm/mach-rockchip/Makefile
> @@ -8,9 +8,9 @@
> # inaccessible/protected memory (and the bootrom-helper assumes that
> # the stack-pointer is valid before switching to the U-Boot stack).
> obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
> -obj-spl-$(CONFIG_SPL_ROCKCHIP_COMMON_BOARD) += spl.o spl-boot-order.o
> +obj-spl-$(CONFIG_SPL_ROCKCHIP_COMMON_BOARD) += spl.o spl-boot-order.o
> spl_common.o
> obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
> -obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o
> +obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o spl_common.o
> obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o
>
> obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
> diff --git a/arch/arm/mach-rockchip/spl.c
> b/arch/arm/mach-rockchip/spl.c
> index 3ce7e792b5a..bbd223bc524 100644
> --- a/arch/arm/mach-rockchip/spl.c
> +++ b/arch/arm/mach-rockchip/spl.c
> @@ -13,6 +13,7 @@
> #include <ram.h>
> #include <spl.h>
> #include <asm/arch-rockchip/bootrom.h>
> +#include <asm/arch-rockchip/timer.h>
> #include <asm/global_data.h>
> #include <asm/io.h>
> #include <linux/bitops.h>
> @@ -86,26 +87,6 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32
> boot_device)
> #define TIMER_FMODE BIT(0)
> #define TIMER_RMODE BIT(1)
>
> -__weak void rockchip_stimer_init(void)
> -{
> -#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
> - /* If Timer already enabled, don't re-init it */
> - u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
> -
> - if (reg & TIMER_EN)
> - return;
> -#ifndef CONFIG_ARM64
> - asm volatile("mcr p15, 0, %0, c14, c0, 0"
> - : : "r"(CONFIG_COUNTER_FREQUENCY));
> -#endif
> - writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
> - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> - writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
> - TIMER_CONTROL_REG);
> -#endif
> -}
> -
> __weak int board_early_init_f(void)
> {
> return 0;
> diff --git a/arch/arm/mach-rockchip/spl_common.c
> b/arch/arm/mach-rockchip/spl_common.c
> new file mode 100644
> index 00000000000..b29f33448ab
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/spl_common.c
> @@ -0,0 +1,36 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2019 Rockchip Electronics Co., Ltd
> + */
> +
> +#include <asm/io.h>
> +#include <linux/bitops.h>
> +
> +#define TIMER_LOAD_COUNT_L 0x00
> +#define TIMER_LOAD_COUNT_H 0x04
> +#define TIMER_CONTROL_REG 0x10
> +#define TIMER_EN 0x1
> +#define TIMER_FMODE BIT(0)
> +#define TIMER_RMODE BIT(1)
> +
> +__weak void rockchip_stimer_init(void)
> +{
> +#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
> + /* If Timer already enabled, don't re-init it */
> + u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
> +
> + if (reg & TIMER_EN)
> + return;
> +
> +#ifndef CONFIG_ARM64
> + asm volatile("mcr p15, 0, %0, c14, c0, 0"
> + : : "r"(CONFIG_COUNTER_FREQUENCY));
> +#endif
> +
> + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
> + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> + writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
> + TIMER_CONTROL_REG);
> +#endif
> +}
> diff --git a/arch/arm/mach-rockchip/tpl.c
> b/arch/arm/mach-rockchip/tpl.c
> index 50f04f9474a..0e1da8c1c89 100644
> --- a/arch/arm/mach-rockchip/tpl.c
> +++ b/arch/arm/mach-rockchip/tpl.c
> @@ -14,41 +14,13 @@
> #include <version.h>
> #include <asm/io.h>
> #include <asm/arch-rockchip/bootrom.h>
> +#include <asm/arch-rockchip/timer.h>
> #include <linux/bitops.h>
>
> #if CONFIG_IS_ENABLED(BANNER_PRINT)
> #include <timestamp.h>
> #endif
>
> -#define TIMER_LOAD_COUNT_L 0x00
> -#define TIMER_LOAD_COUNT_H 0x04
> -#define TIMER_CONTROL_REG 0x10
> -#define TIMER_EN 0x1
> -#define TIMER_FMODE BIT(0)
> -#define TIMER_RMODE BIT(1)
> -
> -__weak void rockchip_stimer_init(void)
> -{
> -#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
> - /* If Timer already enabled, don't re-init it */
> - u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
> -
> - if (reg & TIMER_EN)
> - return;
> -
> -#ifndef CONFIG_ARM64
> - asm volatile("mcr p15, 0, %0, c14, c0, 0"
> - : : "r"(CONFIG_COUNTER_FREQUENCY));
> -#endif
> -
> - writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
> - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> - writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
> - TIMER_CONTROL_REG);
> -#endif
> -}
> -
> void board_init_f(ulong dummy)
> {
> struct udevice *dev;
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