[PATCH v1 6/9] rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC

Anand Moon linux.amoon at gmail.com
Fri May 17 09:45:46 CEST 2024


Hi Jonas,

Dropping @edgeble.ai email ID as it is not working

On Thu, 16 May 2024 at 19:48, Jonas Karlman <jonas at kwiboo.se> wrote:
>
> Hi Anand,
>
> On 2024-05-16 10:59, Anand Moon wrote:
> > Read the reset cause from the clock reset unit for RK356x SoC.
> >
> > Cc: Jagan Teki <jagan at edgeble.ai>
> > Signed-off-by: Anand Moon <anand at edgeble.ai>
> > ---
> >  arch/arm/mach-rockchip/cpu-info.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
> > index 77833c8fce..114608b506 100644
> > --- a/arch/arm/mach-rockchip/cpu-info.c
> > +++ b/arch/arm/mach-rockchip/cpu-info.c
> > @@ -12,6 +12,8 @@
> >  #include <asm/arch-rockchip/cru_rk3328.h>
> >  #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> >  #include <asm/arch-rockchip/cru_rk3399.h>
> > +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK33568)
> > +#include <asm/arch-rockchip/cru_rk3568.h>
> >  #endif
> >  #include <asm/arch-rockchip/hardware.h>
> >  #include <linux/err.h>
> > @@ -22,6 +24,8 @@ char *get_reset_cause(void)
> >       struct rk3328_cru *cru = rockchip_get_cru();
> >  #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> >       struct rockchip_cru *cru = rockchip_get_cru();
> > +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK3568)
> > +     struct rk3568_cru *cru = rockchip_get_cru();
>
> This is strictly not needed for RK3568 after the commit 6e710897aa31
> ("rockchip: cru: Enable cpu info support for rk3568").

Ok, thanks for this input.
>
> Suggest you use same/similar workaround or cleanup the include/define
> statement in arch/arm/include/asm/arch-rockchip/cru.h for all SoCs.
>
> Also at least one RK SoC have other bits set in the glb_rst_st reg.
>
> Suggest you add following:
>
>   GLB_RST_MASK          = GENMASK(5, 0),
>
> and use something like:
>
>   switch (cru->glb_rst_st & GLB_RST_MASK) {
>
> or "unknown reset" is reported on affected SoCs.
>
> I have also seen POR always being reported even after a reboot so please
> confirm that reset reason works on the SoCs/boards you enable this on.
>

Ok, I will check this and update you on this.

> Regards,
> Jonas
>
Thanks
-Anand


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