[PATCH v1 6/9] rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC

[Anand Moon]

Hi Jonas,

On Fri, 17 May 2024 at 13:15, Anand Moon <linux.amoon at gmail.com> wrote:
>
> Hi Jonas,
>
> Dropping @edgeble.ai email ID as it is not working
>
> On Thu, 16 May 2024 at 19:48, Jonas Karlman <jonas at kwiboo.se> wrote:
> >
> > Hi Anand,
> >
> > On 2024-05-16 10:59, Anand Moon wrote:
> > > Read the reset cause from the clock reset unit for RK356x SoC.
> > >
> > > Cc: Jagan Teki <jagan at edgeble.ai>
> > > Signed-off-by: Anand Moon <anand at edgeble.ai>
> > > ---
> > >  arch/arm/mach-rockchip/cpu-info.c | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
> > > index 77833c8fce..114608b506 100644
> > > --- a/arch/arm/mach-rockchip/cpu-info.c
> > > +++ b/arch/arm/mach-rockchip/cpu-info.c
> > > @@ -12,6 +12,8 @@
> > >  #include <asm/arch-rockchip/cru_rk3328.h>
> > >  #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> > >  #include <asm/arch-rockchip/cru_rk3399.h>
> > > +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK33568)
> > > +#include <asm/arch-rockchip/cru_rk3568.h>
> > >  #endif
> > >  #include <asm/arch-rockchip/hardware.h>
> > >  #include <linux/err.h>
> > > @@ -22,6 +24,8 @@ char *get_reset_cause(void)
> > >       struct rk3328_cru *cru = rockchip_get_cru();
> > >  #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> > >       struct rockchip_cru *cru = rockchip_get_cru();
> > > +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK3568)
> > > +     struct rk3568_cru *cru = rockchip_get_cru();
> >
> > This is strictly not needed for RK3568 after the commit 6e710897aa31
> > ("rockchip: cru: Enable cpu info support for rk3568").
>
> Ok, thanks for this input.
> >
> > Suggest you use same/similar workaround or cleanup the include/define
> > statement in arch/arm/include/asm/arch-rockchip/cru.h for all SoCs.
> >

I have made changes for all the SoC that supports this reading of CRU
only build these SoCs,I don't have all the boards to test.

On rock64 with reboot command, it shows (RST)

U-Boot 2024.07-rc3-00021-gb23d5619e6-dirty (May 24 2024 - 12:55:26 +0530)

SoC: Rockchip rk3328
Reset cause: RST
Model: Pine64 Rock64

with poweroff command, it shows (POR)

U-Boot 2024.07-rc3-00021-gb23d5619e6-dirty (May 24 2024 - 12:55:26 +0530)

SoC: Rockchip rk3328
Reset cause: POR

> > Also at least one RK SoC have other bits set in the glb_rst_st reg.
> >
> > Suggest you add following:
> >
> >   GLB_RST_MASK          = GENMASK(5, 0),
> >
> > and use something like:
> >
> >   switch (cru->glb_rst_st & GLB_RST_MASK) {
> >
> > or "unknown reset" is reported on affected SoCs.
> >
> > I have also seen POR always being reported even after a reboot so please
> > confirm that reset reason works on the SoCs/boards you enable this on.
> >

Actually, for RK3568 and RK3688 SoC, we are not able to read the reset
cause via CRU
glb_rst_st is always set to zero.

Either the user space with poweroff and reboot command not updating the CRU
or the u-boot is not registering the sysreset to read the reset cause.

# dm tree
 clk           5  [ + ]   rockchip_rk3588_cru   |-- clock-controller at fd7c0000
 sysreset      0  [   ]   rockchip_sysreset     |   |-- sysreset
 reset         0  [ + ]   rockchip_reset        |   `-- reset

>
> Ok, I will check this and update you on this.
>

Thanks
-Anand