[PATCH 06/13] ARM: dts: stm32: convert stm32mp15 board to OF_UPSTREAM
Patrice Chotard
patrice.chotard at foss.st.com
Tue Apr 1 15:14:06 CEST 2025
Enable OF_UPSTREAM flag for STM32MP15 platforms, except for
stm32mp15-odyssey,see following patch :
"configs: stm32: introduce stm32mp15-odyssey_defconfig"
Signed-off-by: Patrice Chotard <patrice.chotard at foss.st.com>
---
arch/arm/dts/Makefile | 12 -
arch/arm/dts/stm32mp15-pinctrl.dtsi | 2826 -----------------
arch/arm/dts/stm32mp15-scmi.dtsi | 88 -
arch/arm/dts/stm32mp151.dtsi | 1868 -----------
arch/arm/dts/stm32mp153.dtsi | 59 -
arch/arm/dts/stm32mp157.dtsi | 48 -
arch/arm/dts/stm32mp157a-dk1-scmi.dts | 82 -
arch/arm/dts/stm32mp157a-dk1.dts | 25 -
.../stm32mp157a-icore-stm32mp1-ctouch2.dts | 49 -
...157a-microgea-stm32mp1-microdev2.0-of7.dts | 161 -
...32mp157a-microgea-stm32mp1-microdev2.0.dts | 59 -
.../dts/stm32mp157a-microgea-stm32mp1.dtsi | 148 -
arch/arm/dts/stm32mp157c-dk2-scmi.dts | 88 -
arch/arm/dts/stm32mp157c-dk2.dts | 94 -
arch/arm/dts/stm32mp157c-ed1-scmi.dts | 87 -
arch/arm/dts/stm32mp157c-ed1.dts | 403 ---
arch/arm/dts/stm32mp157c-ev1-scmi.dts | 93 -
arch/arm/dts/stm32mp157c-ev1.dts | 414 ---
arch/arm/dts/stm32mp15xc.dtsi | 18 -
arch/arm/dts/stm32mp15xx-dkx.dtsi | 741 -----
arch/arm/dts/stm32mp15xxaa-pinctrl.dtsi | 85 -
arch/arm/dts/stm32mp15xxab-pinctrl.dtsi | 57 -
arch/arm/dts/stm32mp15xxac-pinctrl.dtsi | 73 -
arch/arm/dts/stm32mp15xxad-pinctrl.dtsi | 57 -
arch/arm/mach-stm32mp/Kconfig | 1 +
...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 2 +-
...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 2 +-
...-microgea-stm32mp1-microdev2-of7_defconfig | 2 +-
...mp15-microgea-stm32mp1-microdev2_defconfig | 2 +-
configs/stm32mp15_basic_defconfig | 4 +-
configs/stm32mp15_defconfig | 4 +-
configs/stm32mp15_trusted_defconfig | 4 +-
32 files changed, 14 insertions(+), 7642 deletions(-)
delete mode 100644 arch/arm/dts/stm32mp15-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp15-scmi.dtsi
delete mode 100644 arch/arm/dts/stm32mp151.dtsi
delete mode 100644 arch/arm/dts/stm32mp153.dtsi
delete mode 100644 arch/arm/dts/stm32mp157.dtsi
delete mode 100644 arch/arm/dts/stm32mp157a-dk1-scmi.dts
delete mode 100644 arch/arm/dts/stm32mp157a-dk1.dts
delete mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts
delete mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
delete mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
delete mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1.dtsi
delete mode 100644 arch/arm/dts/stm32mp157c-dk2-scmi.dts
delete mode 100644 arch/arm/dts/stm32mp157c-dk2.dts
delete mode 100644 arch/arm/dts/stm32mp157c-ed1-scmi.dts
delete mode 100644 arch/arm/dts/stm32mp157c-ed1.dts
delete mode 100644 arch/arm/dts/stm32mp157c-ev1-scmi.dts
delete mode 100644 arch/arm/dts/stm32mp157c-ev1.dts
delete mode 100644 arch/arm/dts/stm32mp15xc.dtsi
delete mode 100644 arch/arm/dts/stm32mp15xx-dkx.dtsi
delete mode 100644 arch/arm/dts/stm32mp15xxaa-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp15xxab-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp15xxac-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp15xxad-pinctrl.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d6665356c2f..1e98d95de60 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1066,18 +1066,6 @@ dtb-$(CONFIG_ASPEED_AST2600) += \
ast2600-x4tf.dtb
dtb-$(CONFIG_STM32MP15X) += \
- stm32mp157a-dk1.dtb \
- stm32mp157a-dk1-scmi.dtb \
- stm32mp157a-icore-stm32mp1-ctouch2.dtb \
- stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
- stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
- stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
- stm32mp157c-dk2.dtb \
- stm32mp157c-dk2-scmi.dtb \
- stm32mp157c-ed1.dtb \
- stm32mp157c-ed1-scmi.dtb \
- stm32mp157c-ev1.dtb \
- stm32mp157c-ev1-scmi.dtb \
stm32mp157c-odyssey.dtb
dtb-$(CONFIG_STM32MP25X) += \
diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi
deleted file mode 100644
index 098153ee99a..00000000000
--- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
+++ /dev/null
@@ -1,2826 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
- * Author: Ludovic Barre <ludovic.barre at st.com> for STMicroelectronics.
- */
-#include <dt-bindings/pinctrl/stm32-pinfunc.h>
-
-&pinctrl {
- adc1_ain_pins_a: adc1-ain-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
- <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */
- <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */
- <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */
- <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */
- <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */
- };
- };
-
- adc1_in6_pins_a: adc1-in6-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
- };
- };
-
- adc12_ain_pins_a: adc12-ain-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
- <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
- <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
- <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
- };
- };
-
- adc12_ain_pins_b: adc12-ain-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
- <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
- };
- };
-
- adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
- <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
- };
- };
-
- cec_pins_a: cec-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 15, AF4)>;
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- cec_sleep_pins_a: cec-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
- };
- };
-
- cec_pins_b: cec-1 {
- pins {
- pinmux = <STM32_PINMUX('B', 6, AF5)>;
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- cec_sleep_pins_b: cec-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
- };
- };
-
- dac_ch1_pins_a: dac-ch1-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
- };
- };
-
- dac_ch2_pins_a: dac-ch2-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
- };
- };
-
- dcmi_pins_a: dcmi-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
- <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
- <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
- <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
- <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
- <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
- <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
- <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
- <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
- <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
- <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
- <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
- <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
- bias-disable;
- };
- };
-
- dcmi_sleep_pins_a: dcmi-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
- <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
- <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
- <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
- <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
- <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
- <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
- <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
- <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
- <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
- <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
- <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
- <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
- };
- };
-
- dcmi_pins_b: dcmi-1 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
- <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
- <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
- <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
- <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
- <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
- <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
- <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
- <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
- bias-disable;
- };
- };
-
- dcmi_sleep_pins_b: dcmi-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
- <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
- <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
- <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
- <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
- <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
- <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
- <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
- <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
- };
- };
-
- dcmi_pins_c: dcmi-2 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
- <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
- <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
- <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */
- <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
- <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
- <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
- <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */
- <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
- <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
- <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */
- bias-pull-up;
- };
- };
-
- dcmi_sleep_pins_c: dcmi-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
- <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
- <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
- <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */
- <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
- <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
- <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
- <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */
- <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
- <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
- <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */
- };
- };
-
- ethernet0_rgmii_pins_a: rgmii-0 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
- bias-disable;
- };
- };
-
- ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
- };
- };
-
- ethernet0_rgmii_pins_b: rgmii-1 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
- bias-disable;
- };
- };
-
- ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
- <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
- };
- };
-
- ethernet0_rgmii_pins_c: rgmii-2 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
- bias-disable;
- };
- };
-
- ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
- };
- };
-
- ethernet0_rgmii_pins_d: rgmii-3 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
- bias-disable;
- };
- };
-
- ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
- <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
- };
- };
-
- ethernet0_rgmii_pins_e: rgmii-4 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
- bias-disable;
- };
- };
-
- ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
- <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
- <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
- <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
- <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
- <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
- };
- };
-
- ethernet0_rmii_pins_a: rmii-0 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
- <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
- <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
- bias-disable;
- };
- };
-
- ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
- <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
- };
- };
-
- ethernet0_rmii_pins_b: rmii-1 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
- <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
- <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
- <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
- bias-disable;
- };
- pins4 {
- pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
- };
- };
-
- ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
- <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
- <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
- <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
- };
- };
-
- ethernet0_rmii_pins_c: rmii-2 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
- <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
- <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
- bias-disable;
- };
- };
-
- ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
- <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
- <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
- <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
- <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
- <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
- <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
- <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
- <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
- };
- };
-
- fmc_pins_a: fmc-0 {
- pins1 {
- pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
- <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
- <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
- <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
- <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
- <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
- <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
- <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
- <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
- <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
- <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
- <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
- <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
- bias-pull-up;
- };
- };
-
- fmc_sleep_pins_a: fmc-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
- <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
- <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
- <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
- <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
- <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
- <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
- <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
- <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
- <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
- <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
- <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
- <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
- <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
- };
- };
-
- fmc_pins_b: fmc-1 {
- pins {
- pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
- <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
- <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
- <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
- <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
- <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
- <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
- <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
- <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
- <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
- <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
- <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
- <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
- <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
- <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
- <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
- <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
- <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
- <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
- <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
- <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
- bias-disable;
- drive-push-pull;
- slew-rate = <3>;
- };
- };
-
- fmc_sleep_pins_b: fmc-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
- <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
- <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
- <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
- <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
- <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
- <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
- <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
- <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
- <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
- <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
- <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
- <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
- <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
- <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
- <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
- <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
- <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
- <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
- <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
- <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
- };
- };
-
- i2c1_pins_a: i2c1-0 {
- pins {
- pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
- <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c1_sleep_pins_a: i2c1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
- <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
- };
- };
-
- i2c1_pins_b: i2c1-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
- <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c1_sleep_pins_b: i2c1-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
- <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
- };
- };
-
- i2c2_pins_a: i2c2-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
- <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c2_sleep_pins_a: i2c2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
- <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
- };
- };
-
- i2c2_pins_b1: i2c2-1 {
- pins {
- pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c2_sleep_pins_b1: i2c2-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
- };
- };
-
- i2c2_pins_c: i2c2-2 {
- pins {
- pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
- <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c2_pins_sleep_c: i2c2-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
- <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
- };
- };
-
- i2c5_pins_a: i2c5-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
- <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c5_sleep_pins_a: i2c5-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
- <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
-
- };
- };
-
- i2c5_pins_b: i2c5-1 {
- pins {
- pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
- <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c5_sleep_pins_b: i2c5-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
- <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
- };
- };
-
- i2s2_pins_a: i2s2-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
- <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
- <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- i2s2_sleep_pins_a: i2s2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
- <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
- <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
- };
- };
-
- ltdc_pins_a: ltdc-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
- <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
- <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
- <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
- <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
- <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
- <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
- <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
- <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
- <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
- <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
- <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
- <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
- <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
- <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
- <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
- <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
- <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
- <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
- <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
- <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
- <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
- <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
- <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
- <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
- <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
- <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
- <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- ltdc_sleep_pins_a: ltdc-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
- <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
- <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
- <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
- <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
- <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
- <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
- <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
- <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
- <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
- <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
- <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
- <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
- <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
- <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
- <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
- <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
- <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
- <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
- <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
- <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
- <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
- <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
- <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
- <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
- <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
- <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
- <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
- };
- };
-
- ltdc_pins_b: ltdc-1 {
- pins {
- pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
- <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
- <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
- <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
- <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
- <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
- <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
- <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
- <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
- <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
- <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
- <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
- <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
- <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
- <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
- <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
- <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
- <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
- <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
- <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
- <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
- <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
- <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
- <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
- <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
- <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
- <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
- <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- ltdc_sleep_pins_b: ltdc-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
- <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
- <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
- <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
- <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
- <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
- <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
- <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
- <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
- <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
- <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
- <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
- <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
- <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
- <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
- <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
- <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
- <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
- <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
- <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
- <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
- <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
- <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
- <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
- <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
- <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
- <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
- <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
- };
- };
-
- ltdc_pins_c: ltdc-2 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
- <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
- <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
- <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
- <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
- <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
- <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
- <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
- <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
- <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
- <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
- <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
- <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
- <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
- <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
- <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
- <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
- <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
- <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
- <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
- <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- ltdc_sleep_pins_c: ltdc-sleep-2 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
- <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
- <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
- <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
- <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
- <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
- <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
- <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
- <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
- <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
- <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
- <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
- <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
- <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
- <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
- <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
- <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
- <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
- <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
- <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
- <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
- <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
- };
- };
-
- ltdc_pins_d: ltdc-3 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
- bias-disable;
- drive-push-pull;
- slew-rate = <3>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
- <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
- <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
- <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
- <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
- <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
- <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
- <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
- <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
- <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
- <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
- <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
- <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
- <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
- <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
- <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
- <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
- <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
- <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
- <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
- <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
- <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
- <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
- <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
- <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
- <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
- <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- ltdc_sleep_pins_d: ltdc-sleep-3 {
- pins {
- pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
- <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
- <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
- <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
- <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
- <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
- <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
- <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
- <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
- <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
- <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
- <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
- <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
- <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
- <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
- <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
- <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
- <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
- <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
- <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
- <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
- <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
- <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
- <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
- <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
- <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
- <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
- <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
- };
- };
-
- mco1_pins_a: mco1-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- mco1_sleep_pins_a: mco1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */
- };
- };
-
- mco2_pins_a: mco2-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- mco2_sleep_pins_a: mco2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
- };
- };
-
- m_can1_pins_a: m-can1-0 {
- pins1 {
- pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
- bias-disable;
- };
- };
-
- m_can1_sleep_pins_a: m_can1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
- <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
- };
- };
-
- m_can1_pins_b: m-can1-1 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
- bias-disable;
- };
- };
-
- m_can1_sleep_pins_b: m_can1-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
- <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
- };
- };
-
- m_can1_pins_c: m-can1-2 {
- pins1 {
- pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
- bias-disable;
- };
- };
-
- m_can1_sleep_pins_c: m_can1-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
- <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
- };
- };
-
- m_can2_pins_a: m-can2-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
- bias-disable;
- };
- };
-
- m_can2_sleep_pins_a: m_can2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
- <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
- };
- };
-
- pwm1_pins_a: pwm1-0 {
- pins {
- pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
- <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
- <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm1_sleep_pins_a: pwm1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
- <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
- <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
- };
- };
-
- pwm1_pins_b: pwm1-1 {
- pins {
- pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm1_sleep_pins_b: pwm1-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
- };
- };
-
- pwm1_pins_c: pwm1-2 {
- pins {
- pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm1_sleep_pins_c: pwm1-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
- };
- };
-
- pwm2_pins_a: pwm2-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm2_sleep_pins_a: pwm2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
- };
- };
-
- pwm3_pins_a: pwm3-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm3_sleep_pins_a: pwm3-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
- };
- };
-
- pwm3_pins_b: pwm3-1 {
- pins {
- pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm3_sleep_pins_b: pwm3-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
- };
- };
-
- pwm4_pins_a: pwm4-0 {
- pins {
- pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
- <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm4_sleep_pins_a: pwm4-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
- <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
- };
- };
-
- pwm4_pins_b: pwm4-1 {
- pins {
- pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm4_sleep_pins_b: pwm4-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
- };
- };
-
- pwm5_pins_a: pwm5-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm5_sleep_pins_a: pwm5-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
- };
- };
-
- pwm5_pins_b: pwm5-1 {
- pins {
- pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
- <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
- <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm5_sleep_pins_b: pwm5-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
- <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
- <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
- };
- };
-
- pwm8_pins_a: pwm8-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm8_sleep_pins_a: pwm8-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
- };
- };
-
- pwm8_pins_b: pwm8-1 {
- pins {
- pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
- <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */
- <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */
- <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm8_sleep_pins_b: pwm8-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
- <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */
- <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */
- <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */
- };
- };
-
- pwm12_pins_a: pwm12-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
- bias-pull-down;
- drive-push-pull;
- slew-rate = <0>;
- };
- };
-
- pwm12_sleep_pins_a: pwm12-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
- };
- };
-
- qspi_clk_pins_a: qspi-clk-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
- bias-disable;
- drive-push-pull;
- slew-rate = <3>;
- };
- };
-
- qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
- };
- };
-
- qspi_bk1_pins_a: qspi-bk1-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
- <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
- <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
- <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
- <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
- <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
- <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */
- };
- };
-
- qspi_bk2_pins_a: qspi-bk2-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
- <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
- <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
- <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
- <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
- <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
- <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */
- };
- };
-
- qspi_cs1_pins_a: qspi-cs1-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
- bias-pull-up;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
- };
- };
-
- qspi_cs2_pins_a: qspi-cs2-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
- bias-pull-up;
- drive-push-pull;
- slew-rate = <1>;
- };
- };
-
- qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
- };
- };
-
- sai2a_pins_a: sai2a-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
- <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
- <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
- <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
- slew-rate = <0>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sai2a_sleep_pins_a: sai2a-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
- <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
- <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
- <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
- };
- };
-
- sai2a_pins_b: sai2a-1 {
- pins1 {
- pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
- <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
- <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
- slew-rate = <0>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sai2a_sleep_pins_b: sai2a-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
- <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
- <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
- };
- };
-
- sai2a_pins_c: sai2a-2 {
- pins {
- pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
- <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
- <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
- slew-rate = <0>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sai2a_sleep_pins_c: sai2a-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
- <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
- <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
- };
- };
-
- sai2b_pins_a: sai2b-0 {
- pins1 {
- pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
- <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
- <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
- slew-rate = <0>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
- bias-disable;
- };
- };
-
- sai2b_sleep_pins_a: sai2b-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
- <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
- <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
- <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
- };
- };
-
- sai2b_pins_b: sai2b-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
- bias-disable;
- };
- };
-
- sai2b_sleep_pins_b: sai2b-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
- };
- };
-
- sai2b_pins_c: sai2b-2 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
- bias-disable;
- };
- };
-
- sai2b_sleep_pins_c: sai2b-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
- };
- };
-
- sai2b_pins_d: sai2b-3 {
- pins1 {
- pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */
- <STM32_PINMUX('C', 0, AF8)>, /* SAI2_FS_B */
- <STM32_PINMUX('H', 3, AF10)>; /* SAI2_MCLK_B */
- slew-rate = <0>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
- bias-disable;
- };
- };
-
- sai2b_sleep_pins_d: sai2b-sleep-3 {
- pins1 {
- pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */
- <STM32_PINMUX('C', 0, ANALOG)>, /* SAI2_FS_B */
- <STM32_PINMUX('H', 3, ANALOG)>, /* SAI2_MCLK_B */
- <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
- };
- };
-
- sai4a_pins_a: sai4a-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
- slew-rate = <0>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sai4a_sleep_pins_a: sai4a-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
- };
- };
-
- sdmmc1_b4_pins_a: sdmmc1-b4-0 {
- pins1 {
- pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
- <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
- <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
- pins1 {
- pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
- <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-disable;
- };
- pins3 {
- pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
- slew-rate = <1>;
- drive-open-drain;
- bias-disable;
- };
- };
-
- sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
- pins1 {
- pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
- <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
- <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
- <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
- <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
- };
- };
-
- sdmmc1_b4_pins_b: sdmmc1-b4-1 {
- pins1 {
- pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
- <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
- <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
- pins1 {
- pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
- <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-disable;
- };
- pins3 {
- pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
- slew-rate = <1>;
- drive-open-drain;
- bias-disable;
- };
- };
-
- sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
- <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
- <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */
- <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
- <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
- <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
- };
- };
-
- sdmmc1_dir_pins_a: sdmmc1-dir-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
- <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
- <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
- bias-pull-up;
- };
- };
-
- sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
- <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
- <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
- <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
- <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
- <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
- };
- };
-
- sdmmc1_dir_pins_b: sdmmc1-dir-1 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
- <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
- <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
- bias-pull-up;
- };
- };
-
- sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
- <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
- <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
- <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
- };
- };
-
- sdmmc2_b4_pins_a: sdmmc2-b4-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
- <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
- <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
- <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
- <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
- <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
- <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
- <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-pull-up;
- };
- pins3 {
- pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
- slew-rate = <1>;
- drive-open-drain;
- bias-pull-up;
- };
- };
-
- sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
- <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
- <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
- <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
- <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
- <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
- };
- };
-
- sdmmc2_b4_pins_b: sdmmc2-b4-1 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
- <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
- <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
- <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
- <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
- <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
- <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
- <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-disable;
- };
- pins3 {
- pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
- slew-rate = <1>;
- drive-open-drain;
- bias-disable;
- };
- };
-
- sdmmc2_d47_pins_a: sdmmc2-d47-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
- <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
- <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
- <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
- <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
- };
- };
-
- sdmmc2_d47_pins_b: sdmmc2-d47-1 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
- <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
- <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
- slew-rate = <1>;
- drive-push-pull;
- bias-disable;
- };
- };
-
- sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
- <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
- <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
- };
- };
-
- sdmmc2_d47_pins_c: sdmmc2-d47-2 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
- <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
- <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
- <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
- <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
- };
- };
-
- sdmmc2_d47_pins_d: sdmmc2-d47-3 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
- <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
- <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
- };
- };
-
- sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
- <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
- <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
- };
- };
-
- sdmmc2_d47_pins_e: sdmmc2-d47-4 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
- <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
- <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
- <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
- <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
- <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
- };
- };
-
- sdmmc3_b4_pins_a: sdmmc3-b4-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
- <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
- <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
- <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
- <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
- <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
- <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
- <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-pull-up;
- };
- pins3 {
- pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
- slew-rate = <1>;
- drive-open-drain;
- bias-pull-up;
- };
- };
-
- sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
- <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
- <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
- <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
- <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
- <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
- };
- };
-
- sdmmc3_b4_pins_b: sdmmc3-b4-1 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
- <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
- <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
- <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
- <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-pull-up;
- };
- };
-
- sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
- <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
- <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
- <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
- slew-rate = <1>;
- drive-push-pull;
- bias-pull-up;
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
- slew-rate = <2>;
- drive-push-pull;
- bias-pull-up;
- };
- pins3 {
- pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
- slew-rate = <1>;
- drive-open-drain;
- bias-pull-up;
- };
- };
-
- sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
- <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
- <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
- <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
- <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
- <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
- };
- };
-
- spdifrx_pins_a: spdifrx-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
- bias-disable;
- };
- };
-
- spdifrx_sleep_pins_a: spdifrx-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
- };
- };
-
- spi1_pins_b: spi1-1 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
- <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
- bias-disable;
- };
- };
-
- spi2_pins_a: spi2-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
- <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
- bias-disable;
- };
- };
-
- spi2_pins_b: spi2-1 {
- pins1 {
- pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
- <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
- bias-disable;
- };
- };
-
- spi2_pins_c: spi2-2 {
- pins1 {
- pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
- <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
- bias-disable;
- drive-push-pull;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
- bias-pull-down;
- };
- };
-
- spi4_pins_a: spi4-0 {
- pins {
- pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
- <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
- bias-disable;
- };
- };
-
- spi5_pins_a: spi5-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
- <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
- bias-disable;
- };
- };
-
- stusb1600_pins_a: stusb1600-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 11, GPIO)>;
- bias-pull-up;
- };
- };
-
- uart4_pins_a: uart4-0 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
- bias-disable;
- };
- };
-
- uart4_idle_pins_a: uart4-idle-0 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
- bias-disable;
- };
- };
-
- uart4_sleep_pins_a: uart4-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
- <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
- };
- };
-
- uart4_pins_b: uart4-1 {
- pins1 {
- pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
- bias-disable;
- };
- };
-
- uart4_pins_c: uart4-2 {
- pins1 {
- pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
- bias-disable;
- };
- };
-
- uart4_pins_d: uart4-3 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
- bias-disable;
- };
- };
-
- uart4_idle_pins_d: uart4-idle-3 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
- bias-disable;
- };
- };
-
- uart4_sleep_pins_d: uart4-sleep-3 {
- pins {
- pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
- <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
- };
- };
-
- uart5_pins_a: uart5-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
- bias-disable;
- };
- };
-
- uart7_pins_a: uart7-0 {
- pins1 {
- pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
- <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
- <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
- bias-disable;
- };
- };
-
- uart7_pins_b: uart7-1 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
- bias-disable;
- };
- };
-
- uart7_pins_c: uart7-2 {
- pins1 {
- pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
- bias-pull-up;
- };
- };
-
- uart7_idle_pins_c: uart7-idle-2 {
- pins1 {
- pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
- bias-pull-up;
- };
- };
-
- uart7_sleep_pins_c: uart7-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
- <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
- };
- };
-
- uart8_pins_a: uart8-0 {
- pins1 {
- pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
- bias-disable;
- };
- };
-
- uart8_rtscts_pins_a: uart8rtscts-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
- <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
- bias-disable;
- };
- };
-
- usart1_pins_a: usart1-0 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
- bias-disable;
- };
- };
-
- usart1_idle_pins_a: usart1-idle-0 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
- <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
- };
- };
-
- usart1_sleep_pins_a: usart1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
- <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS_NSS */
- };
- };
-
- usart2_pins_a: usart2-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
- <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
- <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
- bias-disable;
- };
- };
-
- usart2_sleep_pins_a: usart2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
- <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
- <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
- <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
- };
- };
-
- usart2_pins_b: usart2-1 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
- <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
- <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
- bias-disable;
- };
- };
-
- usart2_sleep_pins_b: usart2-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
- <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
- <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
- <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
- };
- };
-
- usart2_pins_c: usart2-2 {
- pins1 {
- pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
- <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
- <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
- bias-disable;
- };
- };
-
- usart2_idle_pins_c: usart2-idle-2 {
- pins1 {
- pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
- <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
- };
- pins2 {
- pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
- bias-disable;
- };
- };
-
- usart2_sleep_pins_c: usart2-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
- <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
- <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
- <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
- };
- };
-
- usart3_pins_a: usart3-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
- bias-disable;
- };
- };
-
- usart3_idle_pins_a: usart3-idle-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
- bias-disable;
- };
- };
-
- usart3_sleep_pins_a: usart3-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
- };
- };
-
- usart3_pins_b: usart3-1 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
- <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
- bias-pull-up;
- };
- };
-
- usart3_idle_pins_b: usart3-idle-1 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
- bias-pull-up;
- };
- };
-
- usart3_sleep_pins_b: usart3-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
- <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
- <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
- };
- };
-
- usart3_pins_c: usart3-2 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
- <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
- bias-pull-up;
- };
- };
-
- usart3_idle_pins_c: usart3-idle-2 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
- bias-pull-up;
- };
- };
-
- usart3_sleep_pins_c: usart3-sleep-2 {
- pins {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
- <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
- <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
- };
- };
-
- usart3_pins_d: usart3-3 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
- <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
- bias-disable;
- };
- };
-
- usart3_idle_pins_d: usart3-idle-3 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
- <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
- };
- pins2 {
- pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
- bias-disable;
- };
- };
-
- usart3_sleep_pins_d: usart3-sleep-3 {
- pins {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
- <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
- <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
- };
- };
-
- usart3_pins_e: usart3-4 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
- <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
- bias-pull-up;
- };
- };
-
- usart3_idle_pins_e: usart3-idle-4 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
- };
- pins2 {
- pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins3 {
- pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
- bias-pull-up;
- };
- };
-
- usart3_sleep_pins_e: usart3-sleep-4 {
- pins {
- pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
- <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
- <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
- };
- };
-
- usart3_pins_f: usart3-5 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
- <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
- <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
- bias-disable;
- };
- };
-
- usbotg_hs_pins_a: usbotg-hs-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
- };
- };
-
- usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
- <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
- };
- };
-};
-
-&pinctrl_z {
- i2c2_pins_b2: i2c2-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c2_sleep_pins_b2: i2c2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
- };
- };
-
- i2c4_pins_a: i2c4-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
- <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c4_sleep_pins_a: i2c4-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
- <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
- };
- };
-
- i2c6_pins_a: i2c6-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
- <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
- bias-disable;
- drive-open-drain;
- slew-rate = <0>;
- };
- };
-
- i2c6_sleep_pins_a: i2c6-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
- <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
- };
- };
-
- spi1_pins_a: spi1-0 {
- pins1 {
- pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
- <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <1>;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
- bias-disable;
- };
- };
-
- spi1_sleep_pins_a: spi1-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */
- <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI1_MISO */
- <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI1_MOSI */
- };
- };
-
- usart1_pins_b: usart1-1 {
- pins1 {
- pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
- bias-disable;
- };
- };
-
- usart1_idle_pins_b: usart1-idle-1 {
- pins1 {
- pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
- bias-disable;
- };
- };
-
- usart1_sleep_pins_b: usart1-sleep-1 {
- pins {
- pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */
- <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp15-scmi.dtsi b/arch/arm/dts/stm32mp15-scmi.dtsi
deleted file mode 100644
index dc3b09f2f2a..00000000000
--- a/arch/arm/dts/stm32mp15-scmi.dtsi
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at foss.st.com> for STMicroelectronics.
- */
-
-/ {
- firmware {
- optee: optee {
- compatible = "linaro,optee-tz";
- method = "smc";
- };
-
- scmi: scmi {
- compatible = "linaro,scmi-optee";
- #address-cells = <1>;
- #size-cells = <0>;
- linaro,optee-channel-id = <0>;
-
- scmi_clk: protocol at 14 {
- reg = <0x14>;
- #clock-cells = <1>;
- };
-
- scmi_reset: protocol at 16 {
- reg = <0x16>;
- #reset-cells = <1>;
- };
-
- scmi_voltd: protocol at 17 {
- reg = <0x17>;
-
- scmi_reguls: regulators {
- #address-cells = <1>;
- #size-cells = <0>;
-
- scmi_reg11: regulator at 0 {
- reg = <0>;
- regulator-name = "reg11";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- scmi_reg18: regulator at 1 {
- reg = <1>;
- regulator-name = "reg18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- scmi_usb33: regulator at 2 {
- reg = <2>;
- regulator-name = "usb33";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
- };
- };
- };
- };
-};
-
-®11 {
- status = "disabled";
-};
-
-®18 {
- status = "disabled";
-};
-
-&usb33 {
- status = "disabled";
-};
-
-&usbotg_hs {
- usb33d-supply = <&scmi_usb33>;
-};
-
-&usbphyc {
- vdda1v1-supply = <&scmi_reg11>;
- vdda1v8-supply = <&scmi_reg18>;
-};
-
-/delete-node/ &clk_hse;
-/delete-node/ &clk_hsi;
-/delete-node/ &clk_lse;
-/delete-node/ &clk_lsi;
-/delete-node/ &clk_csi;
diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
deleted file mode 100644
index e277140d36b..00000000000
--- a/arch/arm/dts/stm32mp151.dtsi
+++ /dev/null
@@ -1,1868 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
- * Author: Ludovic Barre <ludovic.barre at st.com> for STMicroelectronics.
- */
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/stm32mp1-clks.h>
-#include <dt-bindings/reset/stm32mp1-resets.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: cpu at 0 {
- compatible = "arm,cortex-a7";
- clock-frequency = <650000000>;
- device_type = "cpu";
- reg = <0>;
- operating-points-v2 = <&cpu0_opp_table>;
- nvmem-cells = <&part_number_otp>;
- nvmem-cell-names = "part_number";
- };
- };
-
- cpu0_opp_table: cpu0-opp-table {
- compatible = "operating-points-v2";
- opp-shared;
- opp-650000000 {
- opp-hz = /bits/ 64 <650000000>;
- opp-microvolt = <1200000>;
- opp-supported-hw = <0x1>;
- };
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1350000>;
- opp-supported-hw = <0x2>;
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>;
- interrupt-parent = <&intc>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- intc: interrupt-controller at a0021000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0xa0021000 0x1000>,
- <0xa0022000 0x2000>;
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
- interrupt-parent = <&intc>;
- };
-
- clocks {
- clk_hse: clk-hse {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- };
-
- clk_hsi: clk-hsi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <64000000>;
- };
-
- clk_lse: clk-lse {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- };
-
- clk_lsi: clk-lsi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32000>;
- };
-
- clk_csi: clk-csi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <4000000>;
- };
- };
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&dts>;
-
- trips {
- cpu_alert1: cpu-alert1 {
- temperature = <85000>;
- hysteresis = <0>;
- type = "passive";
- };
-
- cpu-crit {
- temperature = <120000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
-
- cooling-maps {
- };
- };
- };
-
- booster: regulator-booster {
- compatible = "st,stm32mp1-booster";
- st,syscfg = <&syscfg>;
- status = "disabled";
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&intc>;
- ranges;
-
- timers2: timer at 40000000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40000000 0x400>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM2_K>;
- clock-names = "int";
- dmas = <&dmamux1 18 0x400 0x1>,
- <&dmamux1 19 0x400 0x1>,
- <&dmamux1 20 0x400 0x1>,
- <&dmamux1 21 0x400 0x1>,
- <&dmamux1 22 0x400 0x1>;
- dma-names = "ch1", "ch2", "ch3", "ch4", "up";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 1 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <1>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- status = "disabled";
- };
- };
-
- timers3: timer at 40001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40001000 0x400>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM3_K>;
- clock-names = "int";
- dmas = <&dmamux1 23 0x400 0x1>,
- <&dmamux1 24 0x400 0x1>,
- <&dmamux1 25 0x400 0x1>,
- <&dmamux1 26 0x400 0x1>,
- <&dmamux1 27 0x400 0x1>,
- <&dmamux1 28 0x400 0x1>;
- dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 2 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <2>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- status = "disabled";
- };
- };
-
- timers4: timer at 40002000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40002000 0x400>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM4_K>;
- clock-names = "int";
- dmas = <&dmamux1 29 0x400 0x1>,
- <&dmamux1 30 0x400 0x1>,
- <&dmamux1 31 0x400 0x1>,
- <&dmamux1 32 0x400 0x1>;
- dma-names = "ch1", "ch2", "ch3", "ch4";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 3 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <3>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- status = "disabled";
- };
- };
-
- timers5: timer at 40003000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40003000 0x400>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM5_K>;
- clock-names = "int";
- dmas = <&dmamux1 55 0x400 0x1>,
- <&dmamux1 56 0x400 0x1>,
- <&dmamux1 57 0x400 0x1>,
- <&dmamux1 58 0x400 0x1>,
- <&dmamux1 59 0x400 0x1>,
- <&dmamux1 60 0x400 0x1>;
- dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 4 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <4>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- status = "disabled";
- };
- };
-
- timers6: timer at 40004000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40004000 0x400>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM6_K>;
- clock-names = "int";
- dmas = <&dmamux1 69 0x400 0x1>;
- dma-names = "up";
- status = "disabled";
-
- timer at 5 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <5>;
- status = "disabled";
- };
- };
-
- timers7: timer at 40005000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40005000 0x400>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM7_K>;
- clock-names = "int";
- dmas = <&dmamux1 70 0x400 0x1>;
- dma-names = "up";
- status = "disabled";
-
- timer at 6 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <6>;
- status = "disabled";
- };
- };
-
- timers12: timer at 40006000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40006000 0x400>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM12_K>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 11 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <11>;
- status = "disabled";
- };
- };
-
- timers13: timer at 40007000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40007000 0x400>;
- interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM13_K>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 12 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <12>;
- status = "disabled";
- };
- };
-
- timers14: timer at 40008000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40008000 0x400>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM14_K>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 13 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <13>;
- status = "disabled";
- };
- };
-
- lptimer1: timer at 40009000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-lptimer";
- reg = <0x40009000 0x400>;
- interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LPTIM1_K>;
- clock-names = "mux";
- wakeup-source;
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm-lp";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- trigger at 0 {
- compatible = "st,stm32-lptimer-trigger";
- reg = <0>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-lptimer-counter";
- status = "disabled";
- };
- };
-
- spi2: spi at 4000b000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32h7-spi";
- reg = <0x4000b000 0x400>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI2_K>;
- resets = <&rcc SPI2_R>;
- dmas = <&dmamux1 39 0x400 0x05>,
- <&dmamux1 40 0x400 0x05>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- i2s2: audio-controller at 4000b000 {
- compatible = "st,stm32h7-i2s";
- #sound-dai-cells = <0>;
- reg = <0x4000b000 0x400>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 39 0x400 0x01>,
- <&dmamux1 40 0x400 0x01>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- spi3: spi at 4000c000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32h7-spi";
- reg = <0x4000c000 0x400>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI3_K>;
- resets = <&rcc SPI3_R>;
- dmas = <&dmamux1 61 0x400 0x05>,
- <&dmamux1 62 0x400 0x05>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- i2s3: audio-controller at 4000c000 {
- compatible = "st,stm32h7-i2s";
- #sound-dai-cells = <0>;
- reg = <0x4000c000 0x400>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 61 0x400 0x01>,
- <&dmamux1 62 0x400 0x01>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- spdifrx: audio-controller at 4000d000 {
- compatible = "st,stm32h7-spdifrx";
- #sound-dai-cells = <0>;
- reg = <0x4000d000 0x400>;
- clocks = <&rcc SPDIF_K>;
- clock-names = "kclk";
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 93 0x400 0x01>,
- <&dmamux1 94 0x400 0x01>;
- dma-names = "rx", "rx-ctrl";
- status = "disabled";
- };
-
- usart2: serial at 4000e000 {
- compatible = "st,stm32h7-uart";
- reg = <0x4000e000 0x400>;
- interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc USART2_K>;
- wakeup-source;
- dmas = <&dmamux1 43 0x400 0x15>,
- <&dmamux1 44 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- usart3: serial at 4000f000 {
- compatible = "st,stm32h7-uart";
- reg = <0x4000f000 0x400>;
- interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc USART3_K>;
- wakeup-source;
- dmas = <&dmamux1 45 0x400 0x15>,
- <&dmamux1 46 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart4: serial at 40010000 {
- compatible = "st,stm32h7-uart";
- reg = <0x40010000 0x400>;
- interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc UART4_K>;
- wakeup-source;
- dmas = <&dmamux1 63 0x400 0x15>,
- <&dmamux1 64 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart5: serial at 40011000 {
- compatible = "st,stm32h7-uart";
- reg = <0x40011000 0x400>;
- interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc UART5_K>;
- wakeup-source;
- dmas = <&dmamux1 65 0x400 0x15>,
- <&dmamux1 66 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- i2c1: i2c at 40012000 {
- compatible = "st,stm32mp15-i2c";
- reg = <0x40012000 0x400>;
- interrupt-names = "event", "error";
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C1_K>;
- resets = <&rcc I2C1_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- st,syscfg-fmp = <&syscfg 0x4 0x1>;
- wakeup-source;
- i2c-analog-filter;
- status = "disabled";
- };
-
- i2c2: i2c at 40013000 {
- compatible = "st,stm32mp15-i2c";
- reg = <0x40013000 0x400>;
- interrupt-names = "event", "error";
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C2_K>;
- resets = <&rcc I2C2_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- st,syscfg-fmp = <&syscfg 0x4 0x2>;
- wakeup-source;
- i2c-analog-filter;
- status = "disabled";
- };
-
- i2c3: i2c at 40014000 {
- compatible = "st,stm32mp15-i2c";
- reg = <0x40014000 0x400>;
- interrupt-names = "event", "error";
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C3_K>;
- resets = <&rcc I2C3_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- st,syscfg-fmp = <&syscfg 0x4 0x4>;
- wakeup-source;
- i2c-analog-filter;
- status = "disabled";
- };
-
- i2c5: i2c at 40015000 {
- compatible = "st,stm32mp15-i2c";
- reg = <0x40015000 0x400>;
- interrupt-names = "event", "error";
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C5_K>;
- resets = <&rcc I2C5_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- st,syscfg-fmp = <&syscfg 0x4 0x10>;
- wakeup-source;
- i2c-analog-filter;
- status = "disabled";
- };
-
- cec: cec at 40016000 {
- compatible = "st,stm32-cec";
- reg = <0x40016000 0x400>;
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc CEC_K>, <&rcc CEC>;
- clock-names = "cec", "hdmi-cec";
- status = "disabled";
- };
-
- dac: dac at 40017000 {
- compatible = "st,stm32h7-dac-core";
- reg = <0x40017000 0x400>;
- clocks = <&rcc DAC12>;
- clock-names = "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- dac1: dac at 1 {
- compatible = "st,stm32-dac";
- #io-channel-cells = <1>;
- reg = <1>;
- status = "disabled";
- };
-
- dac2: dac at 2 {
- compatible = "st,stm32-dac";
- #io-channel-cells = <1>;
- reg = <2>;
- status = "disabled";
- };
- };
-
- uart7: serial at 40018000 {
- compatible = "st,stm32h7-uart";
- reg = <0x40018000 0x400>;
- interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc UART7_K>;
- wakeup-source;
- dmas = <&dmamux1 79 0x400 0x15>,
- <&dmamux1 80 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart8: serial at 40019000 {
- compatible = "st,stm32h7-uart";
- reg = <0x40019000 0x400>;
- interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc UART8_K>;
- wakeup-source;
- dmas = <&dmamux1 81 0x400 0x15>,
- <&dmamux1 82 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- timers1: timer at 44000000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x44000000 0x400>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "brk", "up", "trg-com", "cc";
- clocks = <&rcc TIM1_K>;
- clock-names = "int";
- dmas = <&dmamux1 11 0x400 0x1>,
- <&dmamux1 12 0x400 0x1>,
- <&dmamux1 13 0x400 0x1>,
- <&dmamux1 14 0x400 0x1>,
- <&dmamux1 15 0x400 0x1>,
- <&dmamux1 16 0x400 0x1>,
- <&dmamux1 17 0x400 0x1>;
- dma-names = "ch1", "ch2", "ch3", "ch4",
- "up", "trig", "com";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 0 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <0>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- status = "disabled";
- };
- };
-
- timers8: timer at 44001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x44001000 0x400>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "brk", "up", "trg-com", "cc";
- clocks = <&rcc TIM8_K>;
- clock-names = "int";
- dmas = <&dmamux1 47 0x400 0x1>,
- <&dmamux1 48 0x400 0x1>,
- <&dmamux1 49 0x400 0x1>,
- <&dmamux1 50 0x400 0x1>,
- <&dmamux1 51 0x400 0x1>,
- <&dmamux1 52 0x400 0x1>,
- <&dmamux1 53 0x400 0x1>;
- dma-names = "ch1", "ch2", "ch3", "ch4",
- "up", "trig", "com";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 7 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <7>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- status = "disabled";
- };
- };
-
- usart6: serial at 44003000 {
- compatible = "st,stm32h7-uart";
- reg = <0x44003000 0x400>;
- interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc USART6_K>;
- wakeup-source;
- dmas = <&dmamux1 71 0x400 0x15>,
- <&dmamux1 72 0x400 0x11>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- spi1: spi at 44004000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32h7-spi";
- reg = <0x44004000 0x400>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI1_K>;
- resets = <&rcc SPI1_R>;
- dmas = <&dmamux1 37 0x400 0x05>,
- <&dmamux1 38 0x400 0x05>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- i2s1: audio-controller at 44004000 {
- compatible = "st,stm32h7-i2s";
- #sound-dai-cells = <0>;
- reg = <0x44004000 0x400>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 37 0x400 0x01>,
- <&dmamux1 38 0x400 0x01>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- spi4: spi at 44005000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32h7-spi";
- reg = <0x44005000 0x400>;
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI4_K>;
- resets = <&rcc SPI4_R>;
- dmas = <&dmamux1 83 0x400 0x05>,
- <&dmamux1 84 0x400 0x05>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- timers15: timer at 44006000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x44006000 0x400>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM15_K>;
- clock-names = "int";
- dmas = <&dmamux1 105 0x400 0x1>,
- <&dmamux1 106 0x400 0x1>,
- <&dmamux1 107 0x400 0x1>,
- <&dmamux1 108 0x400 0x1>;
- dma-names = "ch1", "up", "trig", "com";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 14 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <14>;
- status = "disabled";
- };
- };
-
- timers16: timer at 44007000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x44007000 0x400>;
- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM16_K>;
- clock-names = "int";
- dmas = <&dmamux1 109 0x400 0x1>,
- <&dmamux1 110 0x400 0x1>;
- dma-names = "ch1", "up";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
- timer at 15 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <15>;
- status = "disabled";
- };
- };
-
- timers17: timer at 44008000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x44008000 0x400>;
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global";
- clocks = <&rcc TIM17_K>;
- clock-names = "int";
- dmas = <&dmamux1 111 0x400 0x1>,
- <&dmamux1 112 0x400 0x1>;
- dma-names = "ch1", "up";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer at 16 {
- compatible = "st,stm32h7-timer-trigger";
- reg = <16>;
- status = "disabled";
- };
- };
-
- spi5: spi at 44009000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32h7-spi";
- reg = <0x44009000 0x400>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI5_K>;
- resets = <&rcc SPI5_R>;
- dmas = <&dmamux1 85 0x400 0x05>,
- <&dmamux1 86 0x400 0x05>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- sai1: sai at 4400a000 {
- compatible = "st,stm32h7-sai";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x4400a000 0x400>;
- reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>;
- interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&rcc SAI1_R>;
- status = "disabled";
-
- sai1a: audio-controller at 4400a004 {
- #sound-dai-cells = <0>;
-
- compatible = "st,stm32-sai-sub-a";
- reg = <0x4 0x20>;
- clocks = <&rcc SAI1_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 87 0x400 0x01>;
- status = "disabled";
- };
-
- sai1b: audio-controller at 4400a024 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-b";
- reg = <0x24 0x20>;
- clocks = <&rcc SAI1_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 88 0x400 0x01>;
- status = "disabled";
- };
- };
-
- sai2: sai at 4400b000 {
- compatible = "st,stm32h7-sai";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x4400b000 0x400>;
- reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&rcc SAI2_R>;
- status = "disabled";
-
- sai2a: audio-controller at 4400b004 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-a";
- reg = <0x4 0x20>;
- clocks = <&rcc SAI2_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 89 0x400 0x01>;
- status = "disabled";
- };
-
- sai2b: audio-controller at 4400b024 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-b";
- reg = <0x24 0x20>;
- clocks = <&rcc SAI2_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 90 0x400 0x01>;
- status = "disabled";
- };
- };
-
- sai3: sai at 4400c000 {
- compatible = "st,stm32h7-sai";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x4400c000 0x400>;
- reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>;
- interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&rcc SAI3_R>;
- status = "disabled";
-
- sai3a: audio-controller at 4400c004 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-a";
- reg = <0x04 0x20>;
- clocks = <&rcc SAI3_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 113 0x400 0x01>;
- status = "disabled";
- };
-
- sai3b: audio-controller at 4400c024 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-b";
- reg = <0x24 0x20>;
- clocks = <&rcc SAI3_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 114 0x400 0x01>;
- status = "disabled";
- };
- };
-
- dfsdm: dfsdm at 4400d000 {
- compatible = "st,stm32mp1-dfsdm";
- reg = <0x4400d000 0x800>;
- clocks = <&rcc DFSDM_K>;
- clock-names = "dfsdm";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- dfsdm0: filter at 0 {
- compatible = "st,stm32-dfsdm-adc";
- #io-channel-cells = <1>;
- reg = <0>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 101 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
-
- dfsdm1: filter at 1 {
- compatible = "st,stm32-dfsdm-adc";
- #io-channel-cells = <1>;
- reg = <1>;
- interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 102 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
-
- dfsdm2: filter at 2 {
- compatible = "st,stm32-dfsdm-adc";
- #io-channel-cells = <1>;
- reg = <2>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 103 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
-
- dfsdm3: filter at 3 {
- compatible = "st,stm32-dfsdm-adc";
- #io-channel-cells = <1>;
- reg = <3>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 104 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
-
- dfsdm4: filter at 4 {
- compatible = "st,stm32-dfsdm-adc";
- #io-channel-cells = <1>;
- reg = <4>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 91 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
-
- dfsdm5: filter at 5 {
- compatible = "st,stm32-dfsdm-adc";
- #io-channel-cells = <1>;
- reg = <5>;
- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dmamux1 92 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
- };
-
- dma1: dma-controller at 48000000 {
- compatible = "st,stm32-dma";
- reg = <0x48000000 0x400>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc DMA1>;
- resets = <&rcc DMA1_R>;
- #dma-cells = <4>;
- st,mem2mem;
- dma-requests = <8>;
- };
-
- dma2: dma-controller at 48001000 {
- compatible = "st,stm32-dma";
- reg = <0x48001000 0x400>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc DMA2>;
- resets = <&rcc DMA2_R>;
- #dma-cells = <4>;
- st,mem2mem;
- dma-requests = <8>;
- };
-
- dmamux1: dma-router at 48002000 {
- compatible = "st,stm32h7-dmamux";
- reg = <0x48002000 0x40>;
- #dma-cells = <3>;
- dma-requests = <128>;
- dma-masters = <&dma1 &dma2>;
- dma-channels = <16>;
- clocks = <&rcc DMAMUX>;
- resets = <&rcc DMAMUX_R>;
- };
-
- adc: adc at 48003000 {
- compatible = "st,stm32mp1-adc-core";
- reg = <0x48003000 0x400>;
- interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc ADC12>, <&rcc ADC12_K>;
- clock-names = "bus", "adc";
- interrupt-controller;
- st,syscfg = <&syscfg>;
- #interrupt-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- adc1: adc at 0 {
- compatible = "st,stm32mp1-adc";
- #io-channel-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0>;
- interrupt-parent = <&adc>;
- interrupts = <0>;
- dmas = <&dmamux1 9 0x400 0x01>;
- dma-names = "rx";
- status = "disabled";
- };
-
- adc2: adc at 100 {
- compatible = "st,stm32mp1-adc";
- #io-channel-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x100>;
- interrupt-parent = <&adc>;
- interrupts = <1>;
- dmas = <&dmamux1 10 0x400 0x01>;
- dma-names = "rx";
- nvmem-cells = <&vrefint>;
- nvmem-cell-names = "vrefint";
- status = "disabled";
- channel at 13 {
- reg = <13>;
- label = "vrefint";
- };
- channel at 14 {
- reg = <14>;
- label = "vddcore";
- };
- };
- };
-
- sdmmc3: mmc at 48004000 {
- compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
- arm,primecell-periphid = <0x00253180>;
- reg = <0x48004000 0x400>;
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SDMMC3_K>;
- clock-names = "apb_pclk";
- resets = <&rcc SDMMC3_R>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <120000000>;
- status = "disabled";
- };
-
- usbotg_hs: usb-otg at 49000000 {
- compatible = "st,stm32mp15-hsotg", "snps,dwc2";
- reg = <0x49000000 0x10000>;
- clocks = <&rcc USBO_K>, <&usbphyc>;
- clock-names = "otg", "utmi";
- resets = <&rcc USBO_R>;
- reset-names = "dwc2";
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- g-rx-fifo-size = <512>;
- g-np-tx-fifo-size = <32>;
- g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
- dr_mode = "otg";
- otg-rev = <0x200>;
- usb33d-supply = <&usb33>;
- status = "disabled";
- };
-
- ipcc: mailbox at 4c001000 {
- compatible = "st,stm32mp1-ipcc";
- #mbox-cells = <1>;
- reg = <0x4c001000 0x400>;
- st,proc-id = <0>;
- interrupts-extended =
- <&exti 61 1>,
- <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "rx", "tx";
- clocks = <&rcc IPCC>;
- wakeup-source;
- status = "disabled";
- };
-
- dcmi: dcmi at 4c006000 {
- compatible = "st,stm32-dcmi";
- reg = <0x4c006000 0x400>;
- interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&rcc CAMITF_R>;
- clocks = <&rcc DCMI>;
- clock-names = "mclk";
- dmas = <&dmamux1 75 0x400 0x01>;
- dma-names = "tx";
- status = "disabled";
- };
-
- rcc: rcc at 50000000 {
- compatible = "st,stm32mp1-rcc", "syscon";
- reg = <0x50000000 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- clock-names = "hse", "hsi", "csi", "lse", "lsi";
- clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
- <&clk_lse>, <&clk_lsi>;
- };
-
- pwr_regulators: pwr at 50001000 {
- compatible = "st,stm32mp1,pwr-reg";
- reg = <0x50001000 0x10>;
-
- reg11: reg11 {
- regulator-name = "reg11";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- reg18: reg18 {
- regulator-name = "reg18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- usb33: usb33 {
- regulator-name = "usb33";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
- };
-
- pwr_mcu: pwr_mcu at 50001014 {
- compatible = "st,stm32mp151-pwr-mcu", "syscon";
- reg = <0x50001014 0x4>;
- };
-
- exti: interrupt-controller at 5000d000 {
- compatible = "st,stm32mp1-exti", "syscon";
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x5000d000 0x400>;
- };
-
- syscfg: syscon at 50020000 {
- compatible = "st,stm32mp157-syscfg", "syscon";
- reg = <0x50020000 0x400>;
- clocks = <&rcc SYSCFG>;
- };
-
- lptimer2: timer at 50021000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-lptimer";
- reg = <0x50021000 0x400>;
- interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LPTIM2_K>;
- clock-names = "mux";
- wakeup-source;
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm-lp";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- trigger at 1 {
- compatible = "st,stm32-lptimer-trigger";
- reg = <1>;
- status = "disabled";
- };
-
- counter {
- compatible = "st,stm32-lptimer-counter";
- status = "disabled";
- };
- };
-
- lptimer3: timer at 50022000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-lptimer";
- reg = <0x50022000 0x400>;
- interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LPTIM3_K>;
- clock-names = "mux";
- wakeup-source;
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm-lp";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- trigger at 2 {
- compatible = "st,stm32-lptimer-trigger";
- reg = <2>;
- status = "disabled";
- };
- };
-
- lptimer4: timer at 50023000 {
- compatible = "st,stm32-lptimer";
- reg = <0x50023000 0x400>;
- interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LPTIM4_K>;
- clock-names = "mux";
- wakeup-source;
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm-lp";
- #pwm-cells = <3>;
- status = "disabled";
- };
- };
-
- lptimer5: timer at 50024000 {
- compatible = "st,stm32-lptimer";
- reg = <0x50024000 0x400>;
- interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LPTIM5_K>;
- clock-names = "mux";
- wakeup-source;
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm-lp";
- #pwm-cells = <3>;
- status = "disabled";
- };
- };
-
- vrefbuf: vrefbuf at 50025000 {
- compatible = "st,stm32-vrefbuf";
- reg = <0x50025000 0x8>;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <2500000>;
- clocks = <&rcc VREF>;
- status = "disabled";
- };
-
- sai4: sai at 50027000 {
- compatible = "st,stm32h7-sai";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x50027000 0x400>;
- reg = <0x50027000 0x4>, <0x500273f0 0x10>;
- interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&rcc SAI4_R>;
- status = "disabled";
-
- sai4a: audio-controller at 50027004 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-a";
- reg = <0x04 0x20>;
- clocks = <&rcc SAI4_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 99 0x400 0x01>;
- status = "disabled";
- };
-
- sai4b: audio-controller at 50027024 {
- #sound-dai-cells = <0>;
- compatible = "st,stm32-sai-sub-b";
- reg = <0x24 0x20>;
- clocks = <&rcc SAI4_K>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 100 0x400 0x01>;
- status = "disabled";
- };
- };
-
- dts: thermal at 50028000 {
- compatible = "st,stm32-thermal";
- reg = <0x50028000 0x100>;
- interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc TMPSENS>;
- clock-names = "pclk";
- #thermal-sensor-cells = <0>;
- status = "disabled";
- };
-
- hash1: hash at 54002000 {
- compatible = "st,stm32f756-hash";
- reg = <0x54002000 0x400>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc HASH1>;
- resets = <&rcc HASH1_R>;
- dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>;
- dma-names = "in";
- dma-maxburst = <2>;
- status = "disabled";
- };
-
- rng1: rng at 54003000 {
- compatible = "st,stm32-rng";
- reg = <0x54003000 0x400>;
- clocks = <&rcc RNG1_K>;
- resets = <&rcc RNG1_R>;
- status = "disabled";
- };
-
- mdma1: dma-controller at 58000000 {
- compatible = "st,stm32h7-mdma";
- reg = <0x58000000 0x1000>;
- interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc MDMA>;
- resets = <&rcc MDMA_R>;
- #dma-cells = <5>;
- dma-channels = <32>;
- dma-requests = <48>;
- };
-
- fmc: memory-controller at 58002000 {
- #address-cells = <2>;
- #size-cells = <1>;
- compatible = "st,stm32mp1-fmc2-ebi";
- reg = <0x58002000 0x1000>;
- clocks = <&rcc FMC_K>;
- resets = <&rcc FMC_R>;
- status = "disabled";
-
- ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
- <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
- <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
- <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
- <4 0 0x80000000 0x10000000>; /* NAND */
-
- nand-controller at 4,0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32mp1-fmc2-nfc";
- reg = <4 0x00000000 0x1000>,
- <4 0x08010000 0x1000>,
- <4 0x08020000 0x1000>,
- <4 0x01000000 0x1000>,
- <4 0x09010000 0x1000>,
- <4 0x09020000 0x1000>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
- <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
- <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
- dma-names = "tx", "rx", "ecc";
- status = "disabled";
- };
- };
-
- qspi: spi at 58003000 {
- compatible = "st,stm32f469-qspi";
- reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
- reg-names = "qspi", "qspi_mm";
- interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>,
- <&mdma1 22 0x2 0x10100008 0x0 0x0>;
- dma-names = "tx", "rx";
- clocks = <&rcc QSPI_K>;
- resets = <&rcc QSPI_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- sdmmc1: mmc at 58005000 {
- compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
- arm,primecell-periphid = <0x00253180>;
- reg = <0x58005000 0x1000>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SDMMC1_K>;
- clock-names = "apb_pclk";
- resets = <&rcc SDMMC1_R>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <120000000>;
- status = "disabled";
- };
-
- sdmmc2: mmc at 58007000 {
- compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
- arm,primecell-periphid = <0x00253180>;
- reg = <0x58007000 0x1000>;
- interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SDMMC2_K>;
- clock-names = "apb_pclk";
- resets = <&rcc SDMMC2_R>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <120000000>;
- status = "disabled";
- };
-
- crc1: crc at 58009000 {
- compatible = "st,stm32f7-crc";
- reg = <0x58009000 0x400>;
- clocks = <&rcc CRC1>;
- status = "disabled";
- };
-
- ethernet0: ethernet at 5800a000 {
- compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
- reg = <0x5800a000 0x2000>;
- reg-names = "stmmaceth";
- interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clock-names = "stmmaceth",
- "mac-clk-tx",
- "mac-clk-rx",
- "eth-ck",
- "ptp_ref",
- "ethstp";
- clocks = <&rcc ETHMAC>,
- <&rcc ETHTX>,
- <&rcc ETHRX>,
- <&rcc ETHCK_K>,
- <&rcc ETHPTP_K>,
- <&rcc ETHSTP>;
- st,syscon = <&syscfg 0x4>;
- snps,mixed-burst;
- snps,pbl = <2>;
- snps,en-tx-lpi-clockgating;
- snps,axi-config = <&stmmac_axi_config_0>;
- snps,tso;
- status = "disabled";
-
- stmmac_axi_config_0: stmmac-axi-config {
- snps,wr_osr_lmt = <0x7>;
- snps,rd_osr_lmt = <0x7>;
- snps,blen = <0 0 0 0 16 8 4>;
- };
- };
-
- usbh_ohci: usb at 5800c000 {
- compatible = "generic-ohci";
- reg = <0x5800c000 0x1000>;
- clocks = <&usbphyc>, <&rcc USBH>;
- resets = <&rcc USBH_R>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- usbh_ehci: usb at 5800d000 {
- compatible = "generic-ehci";
- reg = <0x5800d000 0x1000>;
- clocks = <&usbphyc>, <&rcc USBH>;
- resets = <&rcc USBH_R>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- companion = <&usbh_ohci>;
- status = "disabled";
- };
-
- ltdc: display-controller at 5a001000 {
- compatible = "st,stm32-ltdc";
- reg = <0x5a001000 0x400>;
- interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc LTDC_PX>;
- clock-names = "lcd";
- resets = <&rcc LTDC_R>;
- status = "disabled";
- };
-
- iwdg2: watchdog at 5a002000 {
- compatible = "st,stm32mp1-iwdg";
- reg = <0x5a002000 0x400>;
- clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
- clock-names = "pclk", "lsi";
- status = "disabled";
- };
-
- usbphyc: usbphyc at 5a006000 {
- #address-cells = <1>;
- #size-cells = <0>;
- #clock-cells = <0>;
- compatible = "st,stm32mp1-usbphyc";
- reg = <0x5a006000 0x1000>;
- clocks = <&rcc USBPHY_K>;
- resets = <&rcc USBPHY_R>;
- vdda1v1-supply = <®11>;
- vdda1v8-supply = <®18>;
- status = "disabled";
-
- usbphyc_port0: usb-phy at 0 {
- #phy-cells = <0>;
- reg = <0>;
- };
-
- usbphyc_port1: usb-phy at 1 {
- #phy-cells = <1>;
- reg = <1>;
- };
- };
-
- usart1: serial at 5c000000 {
- compatible = "st,stm32h7-uart";
- reg = <0x5c000000 0x400>;
- interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc USART1_K>;
- wakeup-source;
- status = "disabled";
- };
-
- spi6: spi at 5c001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32h7-spi";
- reg = <0x5c001000 0x400>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc SPI6_K>;
- resets = <&rcc SPI6_R>;
- dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>,
- <&mdma1 35 0x0 0x40002 0x0 0x0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- i2c4: i2c at 5c002000 {
- compatible = "st,stm32mp15-i2c";
- reg = <0x5c002000 0x400>;
- interrupt-names = "event", "error";
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C4_K>;
- resets = <&rcc I2C4_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- st,syscfg-fmp = <&syscfg 0x4 0x8>;
- wakeup-source;
- i2c-analog-filter;
- status = "disabled";
- };
-
- rtc: rtc at 5c004000 {
- compatible = "st,stm32mp1-rtc";
- reg = <0x5c004000 0x400>;
- clocks = <&rcc RTCAPB>, <&rcc RTC>;
- clock-names = "pclk", "rtc_ck";
- interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- bsec: efuse at 5c005000 {
- compatible = "st,stm32mp15-bsec";
- reg = <0x5c005000 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- part_number_otp: part-number-otp at 4 {
- reg = <0x4 0x1>;
- };
- vrefint: vrefin-cal at 52 {
- reg = <0x52 0x2>;
- };
- ts_cal1: calib at 5c {
- reg = <0x5c 0x2>;
- };
- ts_cal2: calib at 5e {
- reg = <0x5e 0x2>;
- };
- };
-
- i2c6: i2c at 5c009000 {
- compatible = "st,stm32mp15-i2c";
- reg = <0x5c009000 0x400>;
- interrupt-names = "event", "error";
- interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C6_K>;
- resets = <&rcc I2C6_R>;
- #address-cells = <1>;
- #size-cells = <0>;
- st,syscfg-fmp = <&syscfg 0x4 0x20>;
- wakeup-source;
- i2c-analog-filter;
- status = "disabled";
- };
-
- tamp: tamp at 5c00a000 {
- compatible = "st,stm32-tamp", "syscon", "simple-mfd";
- reg = <0x5c00a000 0x400>;
- };
-
- /*
- * Break node order to solve dependency probe issue between
- * pinctrl and exti.
- */
- pinctrl: pinctrl at 50002000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,stm32mp157-pinctrl";
- ranges = <0 0x50002000 0xa400>;
- interrupt-parent = <&exti>;
- st,syscfg = <&exti 0x60 0xff>;
-
- gpioa: gpio at 50002000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x0 0x400>;
- clocks = <&rcc GPIOA>;
- st,bank-name = "GPIOA";
- status = "disabled";
- };
-
- gpiob: gpio at 50003000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x1000 0x400>;
- clocks = <&rcc GPIOB>;
- st,bank-name = "GPIOB";
- status = "disabled";
- };
-
- gpioc: gpio at 50004000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x2000 0x400>;
- clocks = <&rcc GPIOC>;
- st,bank-name = "GPIOC";
- status = "disabled";
- };
-
- gpiod: gpio at 50005000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x3000 0x400>;
- clocks = <&rcc GPIOD>;
- st,bank-name = "GPIOD";
- status = "disabled";
- };
-
- gpioe: gpio at 50006000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x4000 0x400>;
- clocks = <&rcc GPIOE>;
- st,bank-name = "GPIOE";
- status = "disabled";
- };
-
- gpiof: gpio at 50007000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x5000 0x400>;
- clocks = <&rcc GPIOF>;
- st,bank-name = "GPIOF";
- status = "disabled";
- };
-
- gpiog: gpio at 50008000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x6000 0x400>;
- clocks = <&rcc GPIOG>;
- st,bank-name = "GPIOG";
- status = "disabled";
- };
-
- gpioh: gpio at 50009000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x7000 0x400>;
- clocks = <&rcc GPIOH>;
- st,bank-name = "GPIOH";
- status = "disabled";
- };
-
- gpioi: gpio at 5000a000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x8000 0x400>;
- clocks = <&rcc GPIOI>;
- st,bank-name = "GPIOI";
- status = "disabled";
- };
-
- gpioj: gpio at 5000b000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x9000 0x400>;
- clocks = <&rcc GPIOJ>;
- st,bank-name = "GPIOJ";
- status = "disabled";
- };
-
- gpiok: gpio at 5000c000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0xa000 0x400>;
- clocks = <&rcc GPIOK>;
- st,bank-name = "GPIOK";
- status = "disabled";
- };
- };
-
- pinctrl_z: pinctrl at 54004000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,stm32mp157-z-pinctrl";
- ranges = <0 0x54004000 0x400>;
- interrupt-parent = <&exti>;
- st,syscfg = <&exti 0x60 0xff>;
-
- gpioz: gpio at 54004000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0 0x400>;
- clocks = <&rcc GPIOZ>;
- st,bank-name = "GPIOZ";
- st,bank-ioport = <11>;
- status = "disabled";
- };
- };
- };
-
- mlahb: ahb {
- compatible = "st,mlahb", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- dma-ranges = <0x00000000 0x38000000 0x10000>,
- <0x10000000 0x10000000 0x60000>,
- <0x30000000 0x30000000 0x60000>;
-
- m4_rproc: m4 at 10000000 {
- compatible = "st,stm32mp1-m4";
- reg = <0x10000000 0x40000>,
- <0x30000000 0x40000>,
- <0x38000000 0x10000>;
- resets = <&rcc MCU_R>;
- reset-names = "mcu_rst";
- st,syscfg-holdboot = <&rcc 0x10C 0x1>;
- st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
- st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
- st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp153.dtsi b/arch/arm/dts/stm32mp153.dtsi
deleted file mode 100644
index 486084e0b80..00000000000
--- a/arch/arm/dts/stm32mp153.dtsi
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-#include "stm32mp151.dtsi"
-
-/ {
- cpus {
- cpu1: cpu at 1 {
- compatible = "arm,cortex-a7";
- clock-frequency = <650000000>;
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- arm-pmu {
- interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>;
- };
-
- timer {
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- soc {
- m_can1: can at 4400e000 {
- compatible = "bosch,m_can";
- reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
- reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "int0", "int1";
- clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
- clock-names = "hclk", "cclk";
- bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
- status = "disabled";
- };
-
- m_can2: can at 4400f000 {
- compatible = "bosch,m_can";
- reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
- reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "int0", "int1";
- clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
- clock-names = "hclk", "cclk";
- bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp157.dtsi b/arch/arm/dts/stm32mp157.dtsi
deleted file mode 100644
index 6197d878894..00000000000
--- a/arch/arm/dts/stm32mp157.dtsi
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-#include "stm32mp153.dtsi"
-
-/ {
- soc {
- gpu: gpu at 59000000 {
- compatible = "vivante,gc";
- reg = <0x59000000 0x800>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc GPU>, <&rcc GPU_K>;
- clock-names = "bus" ,"core";
- resets = <&rcc GPU_R>;
- };
-
- dsi: dsi at 5a000000 {
- compatible = "st,stm32-dsi";
- reg = <0x5a000000 0x800>;
- clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
- clock-names = "pclk", "ref", "px_clk";
- phy-dsi-supply = <®18>;
- resets = <&rcc DSI_R>;
- reset-names = "apb";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- dsi_in: endpoint {
- };
- };
-
- port at 1 {
- reg = <1>;
- dsi_out: endpoint {
- };
- };
- };
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi.dts b/arch/arm/dts/stm32mp157a-dk1-scmi.dts
deleted file mode 100644
index afcd6285890..00000000000
--- a/arch/arm/dts/stm32mp157a-dk1-scmi.dts
+++ /dev/null
@@ -1,82 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at foss.st.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp157a-dk1.dts"
-#include "stm32mp15-scmi.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
- compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157";
-
- reserved-memory {
- optee at de000000 {
- reg = <0xde000000 0x2000000>;
- no-map;
- };
- };
-};
-
-&cpu0 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cpu1 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&dsi {
- clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
-};
-
-&gpioz {
- clocks = <&scmi_clk CK_SCMI_GPIOZ>;
-};
-
-&hash1 {
- clocks = <&scmi_clk CK_SCMI_HASH1>;
- resets = <&scmi_reset RST_SCMI_HASH1>;
-};
-
-&i2c4 {
- clocks = <&scmi_clk CK_SCMI_I2C4>;
- resets = <&scmi_reset RST_SCMI_I2C4>;
-};
-
-&iwdg2 {
- clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
-};
-
-&mdma1 {
- resets = <&scmi_reset RST_SCMI_MDMA>;
-};
-
-&m4_rproc {
- /delete-property/ st,syscfg-holdboot;
- resets = <&scmi_reset RST_SCMI_MCU>,
- <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
-};
-
-&rcc {
- compatible = "st,stm32mp1-rcc-secure", "syscon";
- clock-names = "hse", "hsi", "csi", "lse", "lsi";
- clocks = <&scmi_clk CK_SCMI_HSE>,
- <&scmi_clk CK_SCMI_HSI>,
- <&scmi_clk CK_SCMI_CSI>,
- <&scmi_clk CK_SCMI_LSE>,
- <&scmi_clk CK_SCMI_LSI>;
-};
-
-&rng1 {
- clocks = <&scmi_clk CK_SCMI_RNG1>;
- resets = <&scmi_reset RST_SCMI_RNG1>;
-};
-
-&rtc {
- clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
-};
diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts
deleted file mode 100644
index 0da3667ab1e..00000000000
--- a/arch/arm/dts/stm32mp157a-dk1.dts
+++ /dev/null
@@ -1,25 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp157.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxac-pinctrl.dtsi"
-#include "stm32mp15xx-dkx.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
- compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
-
- aliases {
- ethernet0 = ðernet0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts b/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts
deleted file mode 100644
index 1f75f1d4518..00000000000
--- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts
+++ /dev/null
@@ -1,49 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
- * Copyright (c) 2020 Engicam srl
- * Copyright (c) 2020 Amarula Solutons(India)
- */
-
-/dts-v1/;
-#include "stm32mp157.dtsi"
-#include "stm32mp157a-icore-stm32mp1.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxaa-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "Engicam i.Core STM32MP1 C.TOUCH 2.0";
- compatible = "engicam,icore-stm32mp1-ctouch2",
- "engicam,icore-stm32mp1", "st,stm32mp157";
-
- aliases {
- serial0 = &uart4;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&sdmmc1 {
- bus-width = <4>;
- disable-wp;
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
- st,neg-edge;
- vmmc-supply = <&v3v3>;
- status = "okay";
-};
-
-&uart4 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart4_pins_a>;
- pinctrl-1 = <&uart4_sleep_pins_a>;
- pinctrl-2 = <&uart4_idle_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
deleted file mode 100644
index f4a49429852..00000000000
--- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
+++ /dev/null
@@ -1,161 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
- * Copyright (c) 2020 Engicam srl
- * Copyright (c) 2020 Amarula Solutons(India)
- */
-
-/dts-v1/;
-#include "stm32mp157.dtsi"
-#include "stm32mp157a-microgea-stm32mp1.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxaa-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 7\" Open Frame";
- compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
- "engicam,microgea-stm32mp1", "st,stm32mp157";
-
- aliases {
- serial0 = &uart4;
- serial1 = &uart8;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- backlight: backlight {
- compatible = "gpio-backlight";
- gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
- default-on;
- };
-
- lcd_3v3: regulator-lcd-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "lcd_3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpiof 10 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- power-supply = <&panel_pwr>;
- };
-
- panel_pwr: regulator-panel-pwr {
- compatible = "regulator-fixed";
- regulator-name = "panel_pwr";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpiob 10 GPIO_ACTIVE_HIGH>;
- regulator-always-on;
- };
-
- panel {
- compatible = "auo,b101aw03";
- backlight = <&backlight>;
- enable-gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>;
- power-supply = <&lcd_3v3>;
-
- port {
- panel_in: endpoint {
- remote-endpoint = <<dc_ep0_out>;
- };
- };
- };
-};
-
-&i2c2 {
- i2c-scl-falling-time-ns = <20>;
- i2c-scl-rising-time-ns = <185>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c2_pins_a>;
- pinctrl-1 = <&i2c2_sleep_pins_a>;
- status = "okay";
-};
-
-<dc {
- pinctrl-names = "default";
- pinctrl-0 = <<dc_pins>;
- status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ltdc_ep0_out: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&panel_in>;
- };
- };
-};
-
-&pinctrl {
- ltdc_pins: ltdc-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
- <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */
- <STM32_PINMUX('H', 11, AF14)>, /* LTDC_R5 */
- <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
- <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */
- <STM32_PINMUX('E', 5, AF14)>, /* LTDC_G0 */
- <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */
- <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
- <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
- <STM32_PINMUX('G', 7, AF14)>, /* LTDC_CLK */
- <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */
- <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
- <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */
- <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
- <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
- <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
- <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
- <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */
- <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
- <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */
- <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
- <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */
- <STM32_PINMUX('I', 4, AF14)>, /* LTDC_B4 */
- <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
- <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */
- <STM32_PINMUX('I', 7, AF14)>, /* LTDC_B7 */
- <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
- <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
- bias-disable;
- drive-push-pull;
- slew-rate = <3>;
- };
- };
-};
-
-&sdmmc1 {
- bus-width = <4>;
- disable-wp;
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
- st,neg-edge;
- vmmc-supply = <&vdd>;
- status = "okay";
-};
-
-&uart4 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart4_pins_a>;
- pinctrl-1 = <&uart4_sleep_pins_a>;
- pinctrl-2 = <&uart4_idle_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
-
-/* J31: RS323 */
-&uart8 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart8_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
deleted file mode 100644
index b9d0d3d6ad1..00000000000
--- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
- * Copyright (c) 2020 Engicam srl
- * Copyright (c) 2020 Amarula Solutons(India)
- */
-
-/dts-v1/;
-#include "stm32mp157.dtsi"
-#include "stm32mp157a-microgea-stm32mp1.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxaa-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
- compatible = "engicam,microgea-stm32mp1-microdev2.0",
- "engicam,microgea-stm32mp1", "st,stm32mp157";
-
- aliases {
- serial0 = &uart4;
- serial1 = &uart8;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&sdmmc1 {
- bus-width = <4>;
- disable-wp;
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
- st,neg-edge;
- vmmc-supply = <&vdd>;
- status = "okay";
-};
-
-&uart4 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart4_pins_a>;
- pinctrl-1 = <&uart4_sleep_pins_a>;
- pinctrl-2 = <&uart4_idle_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
-
-/* J31: RS323 */
-&uart8 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart8_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1.dtsi
deleted file mode 100644
index 0b85175f151..00000000000
--- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1.dtsi
+++ /dev/null
@@ -1,148 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
- * Copyright (c) 2020 Engicam srl
- * Copyright (c) 2020 Amarula Solutons(India)
- */
-
-/ {
- compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
-
- memory at c0000000 {
- device_type = "memory";
- reg = <0xc0000000 0x10000000>;
- };
-
- reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- mcuram2: mcuram2 at 10000000 {
- compatible = "shared-dma-pool";
- reg = <0x10000000 0x40000>;
- no-map;
- };
-
- vdev0vring0: vdev0vring0 at 10040000 {
- compatible = "shared-dma-pool";
- reg = <0x10040000 0x1000>;
- no-map;
- };
-
- vdev0vring1: vdev0vring1 at 10041000 {
- compatible = "shared-dma-pool";
- reg = <0x10041000 0x1000>;
- no-map;
- };
-
- vdev0buffer: vdev0buffer at 10042000 {
- compatible = "shared-dma-pool";
- reg = <0x10042000 0x4000>;
- no-map;
- };
-
- mcuram: mcuram at 30000000 {
- compatible = "shared-dma-pool";
- reg = <0x30000000 0x40000>;
- no-map;
- };
-
- retram: retram at 38000000 {
- compatible = "shared-dma-pool";
- reg = <0x38000000 0x10000>;
- no-map;
- };
- };
-
- vin: regulator-vin {
- compatible = "regulator-fixed";
- regulator-name = "vin";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddcore: regulator-vddcore {
- compatible = "regulator-fixed";
- regulator-name = "vddcore";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- vin-supply = <&vin>;
- };
-
- vdd: regulator-vdd {
- compatible = "regulator-fixed";
- regulator-name = "vdd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- vin-supply = <&vin>;
- };
-
- vddq_ddr: regulator-vddq-ddr {
- compatible = "regulator-fixed";
- regulator-name = "vddq_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- vin-supply = <&vin>;
- };
-};
-
-&dts {
- status = "okay";
-};
-
-&fmc {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&fmc_pins_a>;
- pinctrl-1 = <&fmc_sleep_pins_a>;
- status = "okay";
-
- nand-controller at 4,0 {
- status = "okay";
-
- nand at 0 {
- reg = <0>;
- nand-on-flash-bbt;
- #address-cells = <1>;
- #size-cells = <1>;
- };
- };
-};
-
-&ipcc {
- status = "okay";
-};
-
-&iwdg2{
- timeout-sec = <32>;
- status = "okay";
-};
-
-&m4_rproc{
- memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>;
- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
- mbox-names = "vq0", "vq1", "shutdown";
- interrupt-parent = <&exti>;
- interrupts = <68 1>;
- status = "okay";
-};
-
-&rng1 {
- status = "okay";
-};
-
-&rtc{
- status = "okay";
-};
-
-&vrefbuf {
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- vdda-supply = <&vdd>;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp157c-dk2-scmi.dts b/arch/arm/dts/stm32mp157c-dk2-scmi.dts
deleted file mode 100644
index 39358d90200..00000000000
--- a/arch/arm/dts/stm32mp157c-dk2-scmi.dts
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at foss.st.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp157c-dk2.dts"
-#include "stm32mp15-scmi.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
- compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";
-
- reserved-memory {
- optee at de000000 {
- reg = <0xde000000 0x2000000>;
- no-map;
- };
- };
-};
-
-&cpu0 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cpu1 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cryp1 {
- clocks = <&scmi_clk CK_SCMI_CRYP1>;
- resets = <&scmi_reset RST_SCMI_CRYP1>;
-};
-
-&dsi {
- phy-dsi-supply = <&scmi_reg18>;
- clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
-};
-
-&gpioz {
- clocks = <&scmi_clk CK_SCMI_GPIOZ>;
-};
-
-&hash1 {
- clocks = <&scmi_clk CK_SCMI_HASH1>;
- resets = <&scmi_reset RST_SCMI_HASH1>;
-};
-
-&i2c4 {
- clocks = <&scmi_clk CK_SCMI_I2C4>;
- resets = <&scmi_reset RST_SCMI_I2C4>;
-};
-
-&iwdg2 {
- clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
-};
-
-&mdma1 {
- resets = <&scmi_reset RST_SCMI_MDMA>;
-};
-
-&m4_rproc {
- /delete-property/ st,syscfg-holdboot;
- resets = <&scmi_reset RST_SCMI_MCU>,
- <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
-};
-
-&rcc {
- compatible = "st,stm32mp1-rcc-secure", "syscon";
- clock-names = "hse", "hsi", "csi", "lse", "lsi";
- clocks = <&scmi_clk CK_SCMI_HSE>,
- <&scmi_clk CK_SCMI_HSI>,
- <&scmi_clk CK_SCMI_CSI>,
- <&scmi_clk CK_SCMI_LSE>,
- <&scmi_clk CK_SCMI_LSI>;
-};
-
-&rng1 {
- clocks = <&scmi_clk CK_SCMI_RNG1>;
- resets = <&scmi_reset RST_SCMI_RNG1>;
-};
-
-&rtc {
- clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
-};
diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts
deleted file mode 100644
index 510cca5acb7..00000000000
--- a/arch/arm/dts/stm32mp157c-dk2.dts
+++ /dev/null
@@ -1,94 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp157.dtsi"
-#include "stm32mp15xc.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxac-pinctrl.dtsi"
-#include "stm32mp15xx-dkx.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP157C-DK2 Discovery Board";
- compatible = "st,stm32mp157c-dk2", "st,stm32mp157";
-
- aliases {
- ethernet0 = ðernet0;
- serial3 = &usart2;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&cryp1 {
- status = "okay";
-};
-
-&dsi {
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- panel at 0 {
- compatible = "orisetech,otm8009a";
- reg = <0>;
- reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
- power-supply = <&v3v3>;
- status = "okay";
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&dsi_out>;
- };
- };
- };
-};
-
-&dsi_in {
- remote-endpoint = <<dc_ep1_out>;
-};
-
-&dsi_out {
- remote-endpoint = <&panel_in>;
-};
-
-&i2c1 {
- touchscreen at 38 {
- compatible = "focaltech,ft6236";
- reg = <0x38>;
- interrupts = <2 2>;
- interrupt-parent = <&gpiof>;
- interrupt-controller;
- touchscreen-size-x = <480>;
- touchscreen-size-y = <800>;
- status = "okay";
- };
-};
-
-<dc {
- status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ltdc_ep1_out: endpoint at 1 {
- reg = <1>;
- remote-endpoint = <&dsi_in>;
- };
- };
-};
-
-&usart2 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&usart2_pins_c>;
- pinctrl-1 = <&usart2_sleep_pins_c>;
- pinctrl-2 = <&usart2_idle_pins_c>;
- status = "disabled";
-};
diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi.dts b/arch/arm/dts/stm32mp157c-ed1-scmi.dts
deleted file mode 100644
index 07ea765a455..00000000000
--- a/arch/arm/dts/stm32mp157c-ed1-scmi.dts
+++ /dev/null
@@ -1,87 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at foss.st.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp157c-ed1.dts"
-#include "stm32mp15-scmi.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
- compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
-
- reserved-memory {
- optee at fe000000 {
- reg = <0xfe000000 0x2000000>;
- no-map;
- };
- };
-};
-
-&cpu0 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cpu1 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cryp1 {
- clocks = <&scmi_clk CK_SCMI_CRYP1>;
- resets = <&scmi_reset RST_SCMI_CRYP1>;
-};
-
-&dsi {
- clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
-};
-
-&gpioz {
- clocks = <&scmi_clk CK_SCMI_GPIOZ>;
-};
-
-&hash1 {
- clocks = <&scmi_clk CK_SCMI_HASH1>;
- resets = <&scmi_reset RST_SCMI_HASH1>;
-};
-
-&i2c4 {
- clocks = <&scmi_clk CK_SCMI_I2C4>;
- resets = <&scmi_reset RST_SCMI_I2C4>;
-};
-
-&iwdg2 {
- clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
-};
-
-&mdma1 {
- resets = <&scmi_reset RST_SCMI_MDMA>;
-};
-
-&m4_rproc {
- /delete-property/ st,syscfg-holdboot;
- resets = <&scmi_reset RST_SCMI_MCU>,
- <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
-};
-
-&rcc {
- compatible = "st,stm32mp1-rcc-secure", "syscon";
- clock-names = "hse", "hsi", "csi", "lse", "lsi";
- clocks = <&scmi_clk CK_SCMI_HSE>,
- <&scmi_clk CK_SCMI_HSI>,
- <&scmi_clk CK_SCMI_CSI>,
- <&scmi_clk CK_SCMI_LSE>,
- <&scmi_clk CK_SCMI_LSI>;
-};
-
-&rng1 {
- clocks = <&scmi_clk CK_SCMI_RNG1>;
- resets = <&scmi_reset RST_SCMI_RNG1>;
-};
-
-&rtc {
- clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
-};
diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts
deleted file mode 100644
index 66ed5f9921b..00000000000
--- a/arch/arm/dts/stm32mp157c-ed1.dts
+++ /dev/null
@@ -1,403 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
- * Author: Ludovic Barre <ludovic.barre at st.com> for STMicroelectronics.
- */
-/dts-v1/;
-
-#include "stm32mp157.dtsi"
-#include "stm32mp15xc.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxaa-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/mfd/st,stpmic1.h>
-
-/ {
- model = "STMicroelectronics STM32MP157C eval daughter";
- compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
-
- aliases {
- serial0 = &uart4;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory at c0000000 {
- device_type = "memory";
- reg = <0xC0000000 0x40000000>;
- };
-
- reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- mcuram2: mcuram2 at 10000000 {
- compatible = "shared-dma-pool";
- reg = <0x10000000 0x40000>;
- no-map;
- };
-
- vdev0vring0: vdev0vring0 at 10040000 {
- compatible = "shared-dma-pool";
- reg = <0x10040000 0x1000>;
- no-map;
- };
-
- vdev0vring1: vdev0vring1 at 10041000 {
- compatible = "shared-dma-pool";
- reg = <0x10041000 0x1000>;
- no-map;
- };
-
- vdev0buffer: vdev0buffer at 10042000 {
- compatible = "shared-dma-pool";
- reg = <0x10042000 0x4000>;
- no-map;
- };
-
- mcuram: mcuram at 30000000 {
- compatible = "shared-dma-pool";
- reg = <0x30000000 0x40000>;
- no-map;
- };
-
- retram: retram at 38000000 {
- compatible = "shared-dma-pool";
- reg = <0x38000000 0x10000>;
- no-map;
- };
- };
-
- sd_switch: regulator-sd_switch {
- compatible = "regulator-gpio";
- regulator-name = "sd_switch";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2900000>;
- regulator-type = "voltage";
- regulator-always-on;
-
- gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
- states = <1800000 0x1>,
- <2900000 0x0>;
- };
-
- vin: vin {
- compatible = "regulator-fixed";
- regulator-name = "vin";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-};
-
-&adc {
- /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
- pinctrl-0 = <&adc1_in6_pins_a>;
- pinctrl-names = "default";
- vdd-supply = <&vdd>;
- vdda-supply = <&vdda>;
- vref-supply = <&vdda>;
- status = "disabled";
- adc1: adc at 0 {
- status = "okay";
- channel at 0 {
- reg = <0>;
- /* 16.5 ck_cycles sampling time */
- st,min-sample-time-ns = <400>;
- };
- channel at 1 {
- reg = <1>;
- st,min-sample-time-ns = <400>;
- };
- channel at 6 {
- reg = <6>;
- st,min-sample-time-ns = <400>;
- };
- };
-};
-
-&crc1 {
- status = "okay";
-};
-
-&cryp1 {
- status = "okay";
-};
-
-&dac {
- pinctrl-names = "default";
- pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
- vref-supply = <&vdda>;
- status = "disabled";
- dac1: dac at 1 {
- status = "okay";
- };
- dac2: dac at 2 {
- status = "okay";
- };
-};
-
-&dts {
- status = "okay";
-};
-
-&hash1 {
- status = "okay";
-};
-
-&i2c4 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c4_pins_a>;
- pinctrl-1 = <&i2c4_sleep_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- clock-frequency = <400000>;
- status = "okay";
- /* spare dmas for other usage */
- /delete-property/dmas;
- /delete-property/dma-names;
-
- pmic: stpmic at 33 {
- compatible = "st,stpmic1";
- reg = <0x33>;
- interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- status = "okay";
-
- regulators {
- compatible = "st,stpmic1-regulators";
- buck1-supply = <&vin>;
- buck2-supply = <&vin>;
- buck3-supply = <&vin>;
- buck4-supply = <&vin>;
- ldo1-supply = <&v3v3>;
- ldo2-supply = <&v3v3>;
- ldo3-supply = <&vdd_ddr>;
- ldo4-supply = <&vin>;
- ldo5-supply = <&v3v3>;
- ldo6-supply = <&v3v3>;
- vref_ddr-supply = <&vin>;
- boost-supply = <&vin>;
- pwr_sw1-supply = <&bst_out>;
- pwr_sw2-supply = <&bst_out>;
-
- vddcore: buck1 {
- regulator-name = "vddcore";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd_ddr: buck2 {
- regulator-name = "vdd_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd: buck3 {
- regulator-name = "vdd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- st,mask-reset;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- v3v3: buck4 {
- regulator-name = "v3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-over-current-protection;
- regulator-initial-mode = <0>;
- };
-
- vdda: ldo1 {
- regulator-name = "vdda";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO1 0>;
- };
-
- v2v8: ldo2 {
- regulator-name = "v2v8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- interrupts = <IT_CURLIM_LDO2 0>;
- };
-
- vtt_ddr: ldo3 {
- regulator-name = "vtt_ddr";
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <750000>;
- regulator-always-on;
- regulator-over-current-protection;
- };
-
- vdd_usb: ldo4 {
- regulator-name = "vdd_usb";
- interrupts = <IT_CURLIM_LDO4 0>;
- };
-
- vdd_sd: ldo5 {
- regulator-name = "vdd_sd";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO5 0>;
- regulator-boot-on;
- };
-
- v1v8: ldo6 {
- regulator-name = "v1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- interrupts = <IT_CURLIM_LDO6 0>;
- };
-
- vref_ddr: vref_ddr {
- regulator-name = "vref_ddr";
- regulator-always-on;
- };
-
- bst_out: boost {
- regulator-name = "bst_out";
- interrupts = <IT_OCP_BOOST 0>;
- };
-
- vbus_otg: pwr_sw1 {
- regulator-name = "vbus_otg";
- interrupts = <IT_OCP_OTG 0>;
- };
-
- vbus_sw: pwr_sw2 {
- regulator-name = "vbus_sw";
- interrupts = <IT_OCP_SWOUT 0>;
- regulator-active-discharge = <1>;
- };
- };
-
- onkey {
- compatible = "st,stpmic1-onkey";
- interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
- interrupt-names = "onkey-falling", "onkey-rising";
- power-off-time-sec = <10>;
- status = "okay";
- };
-
- watchdog {
- compatible = "st,stpmic1-wdt";
- status = "disabled";
- };
- };
-};
-
-&ipcc {
- status = "okay";
-};
-
-&iwdg2 {
- timeout-sec = <32>;
- status = "okay";
-};
-
-&m4_rproc {
- memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>;
- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
- mbox-names = "vq0", "vq1", "shutdown", "detach";
- interrupt-parent = <&exti>;
- interrupts = <68 1>;
- status = "okay";
-};
-
-&pwr_regulators {
- vdd-supply = <&vdd>;
- vdd_3v3_usbfs-supply = <&vdd_usb>;
-};
-
-&rng1 {
- status = "okay";
-};
-
-&rtc {
- status = "okay";
-};
-
-&sdmmc1 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
- cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- disable-wp;
- st,sig-dir;
- st,neg-edge;
- st,use-ckin;
- bus-width = <4>;
- vmmc-supply = <&vdd_sd>;
- vqmmc-supply = <&sd_switch>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- status = "okay";
-};
-
-&sdmmc2 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
- pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
- pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
- non-removable;
- no-sd;
- no-sdio;
- st,neg-edge;
- bus-width = <8>;
- vmmc-supply = <&v3v3>;
- vqmmc-supply = <&vdd>;
- mmc-ddr-3_3v;
- status = "okay";
-};
-
-&timers6 {
- status = "okay";
- /* spare dmas for other usage */
- /delete-property/dmas;
- /delete-property/dma-names;
- timer at 5 {
- status = "okay";
- };
-};
-
-&uart4 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart4_pins_a>;
- pinctrl-1 = <&uart4_sleep_pins_a>;
- pinctrl-2 = <&uart4_idle_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
-
-&usbotg_hs {
- vbus-supply = <&vbus_otg>;
-};
-
-&usbphyc_port0 {
- phy-supply = <&vdd_usb>;
-};
-
-&usbphyc_port1 {
- phy-supply = <&vdd_usb>;
-};
diff --git a/arch/arm/dts/stm32mp157c-ev1-scmi.dts b/arch/arm/dts/stm32mp157c-ev1-scmi.dts
deleted file mode 100644
index 813086ec248..00000000000
--- a/arch/arm/dts/stm32mp157c-ev1-scmi.dts
+++ /dev/null
@@ -1,93 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at foss.st.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp157c-ev1.dts"
-#include "stm32mp15-scmi.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
- compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1",
- "st,stm32mp157";
-
- reserved-memory {
- optee at fe000000 {
- reg = <0xfe000000 0x2000000>;
- no-map;
- };
- };
-};
-
-&cpu0 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cpu1 {
- clocks = <&scmi_clk CK_SCMI_MPU>;
-};
-
-&cryp1 {
- clocks = <&scmi_clk CK_SCMI_CRYP1>;
- resets = <&scmi_reset RST_SCMI_CRYP1>;
-};
-
-&dsi {
- phy-dsi-supply = <&scmi_reg18>;
- clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
-};
-
-&gpioz {
- clocks = <&scmi_clk CK_SCMI_GPIOZ>;
-};
-
-&hash1 {
- clocks = <&scmi_clk CK_SCMI_HASH1>;
- resets = <&scmi_reset RST_SCMI_HASH1>;
-};
-
-&i2c4 {
- clocks = <&scmi_clk CK_SCMI_I2C4>;
- resets = <&scmi_reset RST_SCMI_I2C4>;
-};
-
-&iwdg2 {
- clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
-};
-
-&m_can1 {
- clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
-};
-
-&mdma1 {
- resets = <&scmi_reset RST_SCMI_MDMA>;
-};
-
-&m4_rproc {
- /delete-property/ st,syscfg-holdboot;
- resets = <&scmi_reset RST_SCMI_MCU>,
- <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
-};
-
-&rcc {
- compatible = "st,stm32mp1-rcc-secure", "syscon";
- clock-names = "hse", "hsi", "csi", "lse", "lsi";
- clocks = <&scmi_clk CK_SCMI_HSE>,
- <&scmi_clk CK_SCMI_HSI>,
- <&scmi_clk CK_SCMI_CSI>,
- <&scmi_clk CK_SCMI_LSE>,
- <&scmi_clk CK_SCMI_LSI>;
-};
-
-&rng1 {
- clocks = <&scmi_clk CK_SCMI_RNG1>;
- resets = <&scmi_reset RST_SCMI_RNG1>;
-};
-
-&rtc {
- clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
-};
diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
deleted file mode 100644
index cd9c3ff5378..00000000000
--- a/arch/arm/dts/stm32mp157c-ev1.dts
+++ /dev/null
@@ -1,414 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
- * Author: Ludovic Barre <ludovic.barre at st.com> for STMicroelectronics.
- */
-/dts-v1/;
-
-#include "stm32mp157c-ed1.dts"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/media/video-interfaces.h>
-
-/ {
- model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
- compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
-
- aliases {
- serial1 = &usart3;
- ethernet0 = ðernet0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- clocks {
- clk_ext_camera: clk-ext-camera {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- };
- };
-
- joystick {
- compatible = "gpio-keys";
- pinctrl-0 = <&joystick_pins>;
- pinctrl-names = "default";
- button-0 {
- label = "JoySel";
- linux,code = <KEY_ENTER>;
- interrupt-parent = <&stmfx_pinctrl>;
- interrupts = <0 IRQ_TYPE_EDGE_RISING>;
- };
- button-1 {
- label = "JoyDown";
- linux,code = <KEY_DOWN>;
- interrupt-parent = <&stmfx_pinctrl>;
- interrupts = <1 IRQ_TYPE_EDGE_RISING>;
- };
- button-2 {
- label = "JoyLeft";
- linux,code = <KEY_LEFT>;
- interrupt-parent = <&stmfx_pinctrl>;
- interrupts = <2 IRQ_TYPE_EDGE_RISING>;
- };
- button-3 {
- label = "JoyRight";
- linux,code = <KEY_RIGHT>;
- interrupt-parent = <&stmfx_pinctrl>;
- interrupts = <3 IRQ_TYPE_EDGE_RISING>;
- };
- button-4 {
- label = "JoyUp";
- linux,code = <KEY_UP>;
- interrupt-parent = <&stmfx_pinctrl>;
- interrupts = <4 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- panel_backlight: panel-backlight {
- compatible = "gpio-backlight";
- gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
- default-on;
- status = "okay";
- };
-};
-
-&cec {
- pinctrl-names = "default";
- pinctrl-0 = <&cec_pins_a>;
- status = "okay";
-};
-
-&dcmi {
- status = "okay";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&dcmi_pins_a>;
- pinctrl-1 = <&dcmi_sleep_pins_a>;
-
- port {
- dcmi_0: endpoint {
- remote-endpoint = <&ov5640_0>;
- bus-type = <MEDIA_BUS_TYPE_PARALLEL>;
- bus-width = <8>;
- hsync-active = <0>;
- vsync-active = <0>;
- pclk-sample = <1>;
- };
- };
-};
-
-&dsi {
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- panel at 0 {
- compatible = "raydium,rm68200";
- reg = <0>;
- reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
- backlight = <&panel_backlight>;
- power-supply = <&v3v3>;
- status = "okay";
-
- port {
- dsi_panel_in: endpoint {
- remote-endpoint = <&dsi_out>;
- };
- };
- };
-};
-
-&dsi_in {
- remote-endpoint = <<dc_ep0_out>;
-};
-
-&dsi_out {
- remote-endpoint = <&dsi_panel_in>;
-};
-
-ðernet0 {
- status = "okay";
- pinctrl-0 = <ðernet0_rgmii_pins_a>;
- pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- phy-mode = "rgmii-id";
- max-speed = <1000>;
- phy-handle = <&phy0>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
- };
-};
-
-&fmc {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&fmc_pins_a>;
- pinctrl-1 = <&fmc_sleep_pins_a>;
- status = "okay";
-
- nand-controller at 4,0 {
- status = "okay";
-
- nand at 0 {
- reg = <0>;
- nand-on-flash-bbt;
- #address-cells = <1>;
- #size-cells = <1>;
- };
- };
-};
-
-&i2c2 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c2_pins_a>;
- pinctrl-1 = <&i2c2_sleep_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-
- ov5640: camera at 3c {
- compatible = "ovti,ov5640";
- reg = <0x3c>;
- clocks = <&clk_ext_camera>;
- clock-names = "xclk";
- AVDD-supply = <&v2v8>;
- DOVDD-supply = <&v2v8>;
- DVDD-supply = <&v2v8>;
- powerdown-gpios = <&stmfx_pinctrl 18 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
- reset-gpios = <&stmfx_pinctrl 19 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
- rotation = <180>;
- status = "okay";
-
- port {
- ov5640_0: endpoint {
- remote-endpoint = <&dcmi_0>;
- bus-width = <8>;
- data-shift = <2>; /* lines 9:2 are used */
- hsync-active = <0>;
- vsync-active = <0>;
- pclk-sample = <1>;
- };
- };
- };
-
- stmfx: stmfx at 42 {
- compatible = "st,stmfx-0300";
- reg = <0x42>;
- interrupts = <8 IRQ_TYPE_EDGE_RISING>;
- interrupt-parent = <&gpioi>;
- vdd-supply = <&v3v3>;
-
- stmfx_pinctrl: pinctrl {
- compatible = "st,stmfx-0300-pinctrl";
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&stmfx_pinctrl 0 0 24>;
-
- joystick_pins: joystick-pins {
- pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
- bias-pull-down;
- };
- };
- };
-};
-
-&i2c5 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c5_pins_a>;
- pinctrl-1 = <&i2c5_sleep_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-};
-
-<dc {
- status = "okay";
-
- port {
- ltdc_ep0_out: endpoint {
- remote-endpoint = <&dsi_in>;
- };
- };
-};
-
-&m_can1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&m_can1_pins_a>;
- pinctrl-1 = <&m_can1_sleep_pins_a>;
- status = "okay";
-};
-
-&qspi {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a
- &qspi_bk1_pins_a
- &qspi_cs1_pins_a
- &qspi_bk2_pins_a
- &qspi_cs2_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a
- &qspi_bk1_sleep_pins_a
- &qspi_cs1_sleep_pins_a
- &qspi_bk2_sleep_pins_a
- &qspi_cs2_sleep_pins_a>;
- reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- flash0: flash at 0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
- flash1: flash at 1 {
- compatible = "jedec,spi-nor";
- reg = <1>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-};
-
-&sdmmc3 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc3_b4_pins_a>;
- pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
- broken-cd;
- st,neg-edge;
- bus-width = <4>;
- vmmc-supply = <&v3v3>;
- status = "disabled";
-};
-
-&spi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins_a>;
- status = "disabled";
-};
-
-&timers2 {
- /* spare dmas for other usage (un-delete to enable pwm capture) */
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm2_pins_a>;
- pinctrl-1 = <&pwm2_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 1 {
- status = "okay";
- };
-};
-
-&timers8 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm8_pins_a>;
- pinctrl-1 = <&pwm8_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 7 {
- status = "okay";
- };
-};
-
-&timers12 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm12_pins_a>;
- pinctrl-1 = <&pwm12_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 11 {
- status = "okay";
- };
-};
-
-&usart3 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&usart3_pins_b>;
- pinctrl-1 = <&usart3_sleep_pins_b>;
- pinctrl-2 = <&usart3_idle_pins_b>;
- /*
- * HW flow control USART3_RTS is optional, and isn't default wired to
- * the connector. SB23 needs to be soldered in order to use it, and R77
- * (ETH_CLK) should be removed.
- */
- uart-has-rtscts;
- status = "disabled";
-};
-
-&usbh_ehci {
- phys = <&usbphyc_port0>;
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
- /* onboard HUB */
- hub at 1 {
- compatible = "usb424,2514";
- reg = <1>;
- vdd-supply = <&v3v3>;
- };
-};
-
-&usbotg_hs {
- pinctrl-0 = <&usbotg_hs_pins_a>;
- pinctrl-names = "default";
- phys = <&usbphyc_port1 0>;
- phy-names = "usb2-phy";
- status = "okay";
-};
-
-&usbphyc {
- status = "okay";
-};
-
-&usbphyc_port0 {
- st,tune-hs-dc-level = <2>;
- st,enable-fs-rftime-tuning;
- st,enable-hs-rftime-reduction;
- st,trim-hs-current = <15>;
- st,trim-hs-impedance = <1>;
- st,tune-squelch-level = <3>;
- st,tune-hs-rx-offset = <2>;
- st,no-lsfs-sc;
-
- connector {
- compatible = "usb-a-connector";
- vbus-supply = <&vbus_sw>;
- };
-};
-
-&usbphyc_port1 {
- st,tune-hs-dc-level = <2>;
- st,enable-fs-rftime-tuning;
- st,enable-hs-rftime-reduction;
- st,trim-hs-current = <15>;
- st,trim-hs-impedance = <1>;
- st,tune-squelch-level = <3>;
- st,tune-hs-rx-offset = <2>;
- st,no-lsfs-sc;
-};
diff --git a/arch/arm/dts/stm32mp15xc.dtsi b/arch/arm/dts/stm32mp15xc.dtsi
deleted file mode 100644
index b06a55a2fa1..00000000000
--- a/arch/arm/dts/stm32mp15xc.dtsi
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-/ {
- soc {
- cryp1: cryp at 54001000 {
- compatible = "st,stm32mp1-cryp";
- reg = <0x54001000 0x400>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc CRYP1>;
- resets = <&rcc CRYP1_R>;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi
deleted file mode 100644
index 511113f2e39..00000000000
--- a/arch/arm/dts/stm32mp15xx-dkx.dtsi
+++ /dev/null
@@ -1,741 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/mfd/st,stpmic1.h>
-
-/ {
- aliases {
- serial0 = &uart4;
- serial1 = &usart3;
- serial2 = &uart7;
- };
-
- memory at c0000000 {
- device_type = "memory";
- reg = <0xc0000000 0x20000000>;
- };
-
- reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- mcuram2: mcuram2 at 10000000 {
- compatible = "shared-dma-pool";
- reg = <0x10000000 0x40000>;
- no-map;
- };
-
- vdev0vring0: vdev0vring0 at 10040000 {
- compatible = "shared-dma-pool";
- reg = <0x10040000 0x1000>;
- no-map;
- };
-
- vdev0vring1: vdev0vring1 at 10041000 {
- compatible = "shared-dma-pool";
- reg = <0x10041000 0x1000>;
- no-map;
- };
-
- vdev0buffer: vdev0buffer at 10042000 {
- compatible = "shared-dma-pool";
- reg = <0x10042000 0x4000>;
- no-map;
- };
-
- mcuram: mcuram at 30000000 {
- compatible = "shared-dma-pool";
- reg = <0x30000000 0x40000>;
- no-map;
- };
-
- retram: retram at 38000000 {
- compatible = "shared-dma-pool";
- reg = <0x38000000 0x10000>;
- no-map;
- };
- };
-
- led {
- compatible = "gpio-leds";
- led-blue {
- label = "heartbeat";
- gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
- };
-
- sound {
- compatible = "audio-graph-card";
- label = "STM32MP15-DK";
- routing =
- "Playback" , "MCLK",
- "Capture" , "MCLK",
- "MICL" , "Mic Bias";
- dais = <&sai2a_port &sai2b_port &i2s2_port>;
- status = "okay";
- };
-
- vin: vin {
- compatible = "regulator-fixed";
- regulator-name = "vin";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-};
-
-&adc {
- pinctrl-names = "default";
- pinctrl-0 = <&adc12_usb_cc_pins_a>;
- vdd-supply = <&vdd>;
- vdda-supply = <&vdd>;
- vref-supply = <&vrefbuf>;
- status = "okay";
- adc1: adc at 0 {
- status = "okay";
- /*
- * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
- * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
- * 5 * (56 + 47kOhms) * 5pF => 2.5us.
- * Use arbitrary margin here (e.g. 5us).
- */
- channel at 18 {
- reg = <18>;
- st,min-sample-time-ns = <5000>;
- };
- channel at 19 {
- reg = <19>;
- st,min-sample-time-ns = <5000>;
- };
- };
- adc2: adc at 100 {
- status = "okay";
- /* USB Type-C CC1 & CC2 */
- channel at 18 {
- reg = <18>;
- st,min-sample-time-ns = <5000>;
- };
- channel at 19 {
- reg = <19>;
- st,min-sample-time-ns = <5000>;
- };
- };
-};
-
-&cec {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cec_pins_b>;
- pinctrl-1 = <&cec_sleep_pins_b>;
- status = "okay";
-};
-
-&crc1 {
- status = "okay";
-};
-
-&dts {
- status = "okay";
-};
-
-ðernet0 {
- status = "okay";
- pinctrl-0 = <ðernet0_rgmii_pins_a>;
- pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- phy-mode = "rgmii-id";
- max-speed = <1000>;
- phy-handle = <&phy0>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
- };
-};
-
-&hash1 {
- status = "okay";
-};
-
-&i2c1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c1_pins_a>;
- pinctrl-1 = <&i2c1_sleep_pins_a>;
- i2c-scl-rising-time-ns = <100>;
- i2c-scl-falling-time-ns = <7>;
- status = "okay";
- /delete-property/dmas;
- /delete-property/dma-names;
-
- hdmi-transmitter at 39 {
- compatible = "sil,sii9022";
- reg = <0x39>;
- iovcc-supply = <&v3v3_hdmi>;
- cvcc12-supply = <&v1v2_hdmi>;
- reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
- interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
- interrupt-parent = <&gpiog>;
- #sound-dai-cells = <0>;
- status = "okay";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- sii9022_in: endpoint {
- remote-endpoint = <<dc_ep0_out>;
- };
- };
-
- port at 3 {
- reg = <3>;
- sii9022_tx_endpoint: endpoint {
- remote-endpoint = <&i2s2_endpoint>;
- };
- };
- };
- };
-
- cs42l51: cs42l51 at 4a {
- compatible = "cirrus,cs42l51";
- reg = <0x4a>;
- #sound-dai-cells = <0>;
- VL-supply = <&v3v3>;
- VD-supply = <&v1v8_audio>;
- VA-supply = <&v1v8_audio>;
- VAHP-supply = <&v1v8_audio>;
- reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
- clocks = <&sai2a>;
- clock-names = "MCLK";
- status = "okay";
-
- cs42l51_port: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cs42l51_tx_endpoint: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&sai2a_endpoint>;
- frame-master = <&cs42l51_tx_endpoint>;
- bitclock-master = <&cs42l51_tx_endpoint>;
- };
-
- cs42l51_rx_endpoint: endpoint at 1 {
- reg = <1>;
- remote-endpoint = <&sai2b_endpoint>;
- frame-master = <&cs42l51_rx_endpoint>;
- bitclock-master = <&cs42l51_rx_endpoint>;
- };
- };
- };
-};
-
-&i2c4 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c4_pins_a>;
- pinctrl-1 = <&i2c4_sleep_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- clock-frequency = <400000>;
- status = "okay";
- /* spare dmas for other usage */
- /delete-property/dmas;
- /delete-property/dma-names;
-
- stusb1600 at 28 {
- compatible = "st,stusb1600";
- reg = <0x28>;
- interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
- interrupt-parent = <&gpioi>;
- pinctrl-names = "default";
- pinctrl-0 = <&stusb1600_pins_a>;
- status = "okay";
- vdd-supply = <&vin>;
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- power-role = "dual";
- typec-power-opmode = "default";
-
- port {
- con_usbotg_hs_ep: endpoint {
- remote-endpoint = <&usbotg_hs_ep>;
- };
- };
- };
- };
-
- pmic: stpmic at 33 {
- compatible = "st,stpmic1";
- reg = <0x33>;
- interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- status = "okay";
-
- regulators {
- compatible = "st,stpmic1-regulators";
- buck1-supply = <&vin>;
- buck2-supply = <&vin>;
- buck3-supply = <&vin>;
- buck4-supply = <&vin>;
- ldo1-supply = <&v3v3>;
- ldo2-supply = <&vin>;
- ldo3-supply = <&vdd_ddr>;
- ldo4-supply = <&vin>;
- ldo5-supply = <&vin>;
- ldo6-supply = <&v3v3>;
- vref_ddr-supply = <&vin>;
- boost-supply = <&vin>;
- pwr_sw1-supply = <&bst_out>;
- pwr_sw2-supply = <&bst_out>;
-
- vddcore: buck1 {
- regulator-name = "vddcore";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd_ddr: buck2 {
- regulator-name = "vdd_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd: buck3 {
- regulator-name = "vdd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- st,mask-reset;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- v3v3: buck4 {
- regulator-name = "v3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-over-current-protection;
- regulator-initial-mode = <0>;
- };
-
- v1v8_audio: ldo1 {
- regulator-name = "v1v8_audio";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- interrupts = <IT_CURLIM_LDO1 0>;
- };
-
- v3v3_hdmi: ldo2 {
- regulator-name = "v3v3_hdmi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- interrupts = <IT_CURLIM_LDO2 0>;
- };
-
- vtt_ddr: ldo3 {
- regulator-name = "vtt_ddr";
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <750000>;
- regulator-always-on;
- regulator-over-current-protection;
- };
-
- vdd_usb: ldo4 {
- regulator-name = "vdd_usb";
- interrupts = <IT_CURLIM_LDO4 0>;
- };
-
- vdda: ldo5 {
- regulator-name = "vdda";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO5 0>;
- regulator-boot-on;
- };
-
- v1v2_hdmi: ldo6 {
- regulator-name = "v1v2_hdmi";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- interrupts = <IT_CURLIM_LDO6 0>;
- };
-
- vref_ddr: vref_ddr {
- regulator-name = "vref_ddr";
- regulator-always-on;
- };
-
- bst_out: boost {
- regulator-name = "bst_out";
- interrupts = <IT_OCP_BOOST 0>;
- };
-
- vbus_otg: pwr_sw1 {
- regulator-name = "vbus_otg";
- interrupts = <IT_OCP_OTG 0>;
- };
-
- vbus_sw: pwr_sw2 {
- regulator-name = "vbus_sw";
- interrupts = <IT_OCP_SWOUT 0>;
- regulator-active-discharge = <1>;
- };
- };
-
- onkey {
- compatible = "st,stpmic1-onkey";
- interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
- interrupt-names = "onkey-falling", "onkey-rising";
- power-off-time-sec = <10>;
- status = "okay";
- };
-
- watchdog {
- compatible = "st,stpmic1-wdt";
- status = "disabled";
- };
- };
-};
-
-&i2c5 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2c5_pins_a>;
- pinctrl-1 = <&i2c5_sleep_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- clock-frequency = <400000>;
- /* spare dmas for other usage */
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
-};
-
-&i2s2 {
- clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
- clock-names = "pclk", "i2sclk", "x8k", "x11k";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&i2s2_pins_a>;
- pinctrl-1 = <&i2s2_sleep_pins_a>;
- status = "okay";
-
- i2s2_port: port {
- i2s2_endpoint: endpoint {
- remote-endpoint = <&sii9022_tx_endpoint>;
- dai-format = "i2s";
- mclk-fs = <256>;
- };
- };
-};
-
-&ipcc {
- status = "okay";
-};
-
-&iwdg2 {
- timeout-sec = <32>;
- status = "okay";
-};
-
-<dc {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <<dc_pins_a>;
- pinctrl-1 = <<dc_sleep_pins_a>;
- status = "okay";
-
- port {
- ltdc_ep0_out: endpoint {
- remote-endpoint = <&sii9022_in>;
- };
- };
-};
-
-&m4_rproc {
- memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
- <&vdev0vring1>, <&vdev0buffer>;
- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
- mbox-names = "vq0", "vq1", "shutdown", "detach";
- interrupt-parent = <&exti>;
- interrupts = <68 1>;
- status = "okay";
-};
-
-&pwr_regulators {
- vdd-supply = <&vdd>;
- vdd_3v3_usbfs-supply = <&vdd_usb>;
-};
-
-&rng1 {
- status = "okay";
-};
-
-&rtc {
- status = "okay";
-};
-
-&sai2 {
- clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
- clock-names = "pclk", "x8k", "x11k";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
- pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
- status = "okay";
-
- sai2a: audio-controller at 4400b004 {
- #clock-cells = <0>;
- dma-names = "tx";
- status = "okay";
-
- sai2a_port: port {
- sai2a_endpoint: endpoint {
- remote-endpoint = <&cs42l51_tx_endpoint>;
- dai-format = "i2s";
- mclk-fs = <256>;
- dai-tdm-slot-num = <2>;
- dai-tdm-slot-width = <32>;
- };
- };
- };
-
- sai2b: audio-controller at 4400b024 {
- dma-names = "rx";
- st,sync = <&sai2a 2>;
- clocks = <&rcc SAI2_K>, <&sai2a>;
- clock-names = "sai_ck", "MCLK";
- status = "okay";
-
- sai2b_port: port {
- sai2b_endpoint: endpoint {
- remote-endpoint = <&cs42l51_rx_endpoint>;
- dai-format = "i2s";
- mclk-fs = <256>;
- dai-tdm-slot-num = <2>;
- dai-tdm-slot-width = <32>;
- };
- };
- };
-};
-
-&sdmmc1 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
- cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- disable-wp;
- st,neg-edge;
- bus-width = <4>;
- vmmc-supply = <&v3v3>;
- status = "okay";
-};
-
-&sdmmc3 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc3_b4_pins_a>;
- pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
- broken-cd;
- st,neg-edge;
- bus-width = <4>;
- vmmc-supply = <&v3v3>;
- status = "disabled";
-};
-
-&timers1 {
- /* spare dmas for other usage */
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm1_pins_a>;
- pinctrl-1 = <&pwm1_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 0 {
- status = "okay";
- };
-};
-
-&timers3 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm3_pins_a>;
- pinctrl-1 = <&pwm3_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 2 {
- status = "okay";
- };
-};
-
-&timers4 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
- pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 3 {
- status = "okay";
- };
-};
-
-&timers5 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm5_pins_a>;
- pinctrl-1 = <&pwm5_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 4 {
- status = "okay";
- };
-};
-
-&timers6 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- timer at 5 {
- status = "okay";
- };
-};
-
-&timers12 {
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
- pwm {
- pinctrl-0 = <&pwm12_pins_a>;
- pinctrl-1 = <&pwm12_sleep_pins_a>;
- pinctrl-names = "default", "sleep";
- status = "okay";
- };
- timer at 11 {
- status = "okay";
- };
-};
-
-&uart4 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart4_pins_a>;
- pinctrl-1 = <&uart4_sleep_pins_a>;
- pinctrl-2 = <&uart4_idle_pins_a>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "okay";
-};
-
-&uart7 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&uart7_pins_c>;
- pinctrl-1 = <&uart7_sleep_pins_c>;
- pinctrl-2 = <&uart7_idle_pins_c>;
- /delete-property/dmas;
- /delete-property/dma-names;
- status = "disabled";
-};
-
-&usart3 {
- pinctrl-names = "default", "sleep", "idle";
- pinctrl-0 = <&usart3_pins_c>;
- pinctrl-1 = <&usart3_sleep_pins_c>;
- pinctrl-2 = <&usart3_idle_pins_c>;
- uart-has-rtscts;
- status = "disabled";
-};
-
-&usbh_ehci {
- phys = <&usbphyc_port0>;
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
- /* onboard HUB */
- hub at 1 {
- compatible = "usb424,2514";
- reg = <1>;
- vdd-supply = <&v3v3>;
- };
-};
-
-&usbotg_hs {
- phys = <&usbphyc_port1 0>;
- phy-names = "usb2-phy";
- usb-role-switch;
- status = "okay";
-
- port {
- usbotg_hs_ep: endpoint {
- remote-endpoint = <&con_usbotg_hs_ep>;
- };
- };
-};
-
-&usbphyc {
- status = "okay";
-};
-
-&usbphyc_port0 {
- phy-supply = <&vdd_usb>;
- st,tune-hs-dc-level = <2>;
- st,enable-fs-rftime-tuning;
- st,enable-hs-rftime-reduction;
- st,trim-hs-current = <15>;
- st,trim-hs-impedance = <1>;
- st,tune-squelch-level = <3>;
- st,tune-hs-rx-offset = <2>;
- st,no-lsfs-sc;
-};
-
-&usbphyc_port1 {
- phy-supply = <&vdd_usb>;
- st,tune-hs-dc-level = <2>;
- st,enable-fs-rftime-tuning;
- st,enable-hs-rftime-reduction;
- st,trim-hs-current = <15>;
- st,trim-hs-impedance = <1>;
- st,tune-squelch-level = <3>;
- st,tune-hs-rx-offset = <2>;
- st,no-lsfs-sc;
-};
-
-&vrefbuf {
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- vdda-supply = <&vdd>;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp15xxaa-pinctrl.dtsi b/arch/arm/dts/stm32mp15xxaa-pinctrl.dtsi
deleted file mode 100644
index 04f7a43ad66..00000000000
--- a/arch/arm/dts/stm32mp15xxaa-pinctrl.dtsi
+++ /dev/null
@@ -1,85 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AA>;
-
- gpioa: gpio at 50002000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio at 50003000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio at 50004000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 32 16>;
- };
-
- gpiod: gpio at 50005000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio at 50006000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio at 50007000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio at 50008000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio at 50009000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 112 16>;
- };
-
- gpioi: gpio at 5000a000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 128 16>;
- };
-
- gpioj: gpio at 5000b000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 144 16>;
- };
-
- gpiok: gpio at 5000c000 {
- status = "okay";
- ngpios = <8>;
- gpio-ranges = <&pinctrl 0 160 8>;
- };
-};
-
-&pinctrl_z {
- st,package = <STM32MP_PKG_AA>;
-
- gpioz: gpio at 54004000 {
- status = "okay";
- ngpios = <8>;
- gpio-ranges = <&pinctrl_z 0 400 8>;
- };
-};
diff --git a/arch/arm/dts/stm32mp15xxab-pinctrl.dtsi b/arch/arm/dts/stm32mp15xxab-pinctrl.dtsi
deleted file mode 100644
index 328dad140e9..00000000000
--- a/arch/arm/dts/stm32mp15xxab-pinctrl.dtsi
+++ /dev/null
@@ -1,57 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AB>;
-
- gpioa: gpio at 50002000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio at 50003000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio at 50004000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 32 16>;
- };
-
- gpiod: gpio at 50005000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio at 50006000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio at 50007000 {
- status = "okay";
- ngpios = <6>;
- gpio-ranges = <&pinctrl 6 86 6>;
- };
-
- gpiog: gpio at 50008000 {
- status = "okay";
- ngpios = <10>;
- gpio-ranges = <&pinctrl 6 102 10>;
- };
-
- gpioh: gpio at 50009000 {
- status = "okay";
- ngpios = <2>;
- gpio-ranges = <&pinctrl 0 112 2>;
- };
-};
diff --git a/arch/arm/dts/stm32mp15xxac-pinctrl.dtsi b/arch/arm/dts/stm32mp15xxac-pinctrl.dtsi
deleted file mode 100644
index 7eaa245f44d..00000000000
--- a/arch/arm/dts/stm32mp15xxac-pinctrl.dtsi
+++ /dev/null
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AC>;
-
- gpioa: gpio at 50002000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio at 50003000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio at 50004000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 32 16>;
- };
-
- gpiod: gpio at 50005000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio at 50006000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio at 50007000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio at 50008000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio at 50009000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 112 16>;
- };
-
- gpioi: gpio at 5000a000 {
- status = "okay";
- ngpios = <12>;
- gpio-ranges = <&pinctrl 0 128 12>;
- };
-};
-
-&pinctrl_z {
- st,package = <STM32MP_PKG_AC>;
-
- gpioz: gpio at 54004000 {
- status = "okay";
- ngpios = <8>;
- gpio-ranges = <&pinctrl_z 0 400 8>;
- };
-};
diff --git a/arch/arm/dts/stm32mp15xxad-pinctrl.dtsi b/arch/arm/dts/stm32mp15xxad-pinctrl.dtsi
deleted file mode 100644
index b63e207de21..00000000000
--- a/arch/arm/dts/stm32mp15xxad-pinctrl.dtsi
+++ /dev/null
@@ -1,57 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.torgue at st.com> for STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AD>;
-
- gpioa: gpio at 50002000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio at 50003000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio at 50004000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 32 16>;
- };
-
- gpiod: gpio at 50005000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio at 50006000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio at 50007000 {
- status = "okay";
- ngpios = <6>;
- gpio-ranges = <&pinctrl 6 86 6>;
- };
-
- gpiog: gpio at 50008000 {
- status = "okay";
- ngpios = <10>;
- gpio-ranges = <&pinctrl 6 102 10>;
- };
-
- gpioh: gpio at 50009000 {
- status = "okay";
- ngpios = <2>;
- gpio-ranges = <&pinctrl 0 112 2>;
- };
-};
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 3a5f488fe10..7ba928cf428 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -74,6 +74,7 @@ config STM32MP15X
select SUPPORT_SPL
select SYS_ARCH_TIMER
imply CMD_NVEDIT_INFO
+ imply OF_UPSTREAM
help
support of STMicroelectronics SOC STM32MP15x family
STM32MP157, STM32MP153 or STM32MP151
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
index 28a5d93912a..fc095ac0de1 100644
--- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157a-icore-stm32mp1-ctouch2"
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
CONFIG_SPL_TEXT_BASE=0x2FFC2500
diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
index efac47645a9..b243c45d690 100644
--- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157a-icore-stm32mp1-edimm2.2"
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
CONFIG_SPL_TEXT_BASE=0x2FFC2500
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
index f9f55d12a87..e635c726459 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157a-microgea-stm32mp1-microdev2.0-of7"
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
CONFIG_SPL_TEXT_BASE=0x2FFC2500
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
index d5732358376..9e7849ff8f0 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157a-microgea-stm32mp1-microdev2.0"
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
CONFIG_SPL_TEXT_BASE=0x2FFC2500
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index cda17e5a40b..e3090ec2a50 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -6,7 +6,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157c-ev1"
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x30000000
CONFIG_SPL_TEXT_BASE=0x2FFC2500
@@ -81,6 +81,8 @@ CONFIG_CMD_LOG=y
CONFIG_CMD_UBI=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM_BUILD_VENDOR=y
+CONFIG_OF_UPSTREAM_VENDOR="st"
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_MMC=y
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index d31349e3f2b..5ddec18b520 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x900000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157c-ev1"
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
@@ -54,6 +54,8 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_LOG=y
CONFIG_CMD_UBI=y
CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM_BUILD_VENDOR=y
+CONFIG_OF_UPSTREAM_VENDOR="st"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index 1f807f37c69..f0e6b64ffde 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x280000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157c-ev1"
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_DDR_CACHEABLE_SIZE=0x10000000
@@ -55,6 +55,8 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_LOG=y
CONFIG_CMD_UBI=y
CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM_BUILD_VENDOR=y
+CONFIG_OF_UPSTREAM_VENDOR="st"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
--
2.25.1
More information about the U-Boot
mailing list