[PATCH v2 1/1] sysreset: diverge GPIO reset and poweroff configs per-phase
Svyatoslav Ryhel
clamor95 at gmail.com
Tue Apr 1 17:46:35 CEST 2025
вт, 1 квіт. 2025 р. о 18:38 Svyatoslav Ryhel <clamor95 at gmail.com> пише:
>
> GPIO reset and power-off functionality depends on device tree data, which
> is often absent in SPL or TPL. To address this, incorporate PHASE_ into the
> config and add Kconfig option for each phase.
>
> Adjust SYSRESET_GPIO and POWEROFF_GPIO uses to address possible
> regressions.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95 at gmail.com>
> ---
> board/sifive/unleashed/Kconfig | 1 +
> board/sifive/unmatched/Kconfig | 1 +
> configs/ge_b1x5v2_defconfig | 1 +
> configs/microblaze-generic_defconfig | 1 +
> drivers/sysreset/Kconfig | 45 ++++++++++++++++++++++++++++
> drivers/sysreset/Makefile | 4 +--
> 6 files changed, 51 insertions(+), 2 deletions(-)
>
> diff --git a/board/sifive/unleashed/Kconfig b/board/sifive/unleashed/Kconfig
> index 5d842c36cfc..bf4a00d6f7f 100644
> --- a/board/sifive/unleashed/Kconfig
> +++ b/board/sifive/unleashed/Kconfig
> @@ -49,6 +49,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply SPI_FLASH_ISSI
> imply SYSRESET
> imply SYSRESET_GPIO
> + imply SPL_SYSRESET_GPIO if SPL
> imply CMD_I2C
>
> endif
> diff --git a/board/sifive/unmatched/Kconfig b/board/sifive/unmatched/Kconfig
> index bc1f33bde30..991dd23f1d4 100644
> --- a/board/sifive/unmatched/Kconfig
> +++ b/board/sifive/unmatched/Kconfig
> @@ -48,6 +48,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply PHY_MSCC
> imply SYSRESET
> imply SYSRESET_GPIO
> + imply SPL_SYSRESET_GPIO if SPL
> imply CMD_I2C
>
> endif
> diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig
> index fec4b67aee2..b8cca3c74df 100644
> --- a/configs/ge_b1x5v2_defconfig
> +++ b/configs/ge_b1x5v2_defconfig
> @@ -116,6 +116,7 @@ CONFIG_MXC_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_SYSRESET_CMD_POWEROFF=y
> CONFIG_POWEROFF_GPIO=y
> +CONFIG_SPL_POWEROFF_GPIO=y
> CONFIG_SYSRESET_WATCHDOG=y
> CONFIG_IMX_THERMAL=y
> CONFIG_USB=y
> diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
> index 08f8bdb4240..7497d20ee64 100644
> --- a/configs/microblaze-generic_defconfig
> +++ b/configs/microblaze-generic_defconfig
> @@ -97,6 +97,7 @@ CONFIG_SYS_NS16550=y
> CONFIG_XILINX_UARTLITE=y
> CONFIG_XILINX_SPI=y
> CONFIG_SYSRESET_GPIO=y
> +CONFIG_SPL_SYSRESET_GPIO=y
> CONFIG_SYSRESET_MICROBLAZE=y
> CONFIG_WDT=y
> CONFIG_XILINX_TB_WATCHDOG=y
> diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> index 475540ffac7..4972905482a 100644
> --- a/drivers/sysreset/Kconfig
> +++ b/drivers/sysreset/Kconfig
> @@ -71,6 +71,27 @@ config POWEROFF_GPIO
> Support for system poweroff using a GPIO pin. This can be used
> for systems having a single GPIO to trigger a system poweroff.
>
> +config SPL_POWEROFF_GPIO
> + bool "Enable support for GPIO poweroff driver in SPL"
> + depends on DM_GPIO && SPL
> + help
> + Support for system poweroff using a GPIO pin in SPL. This can be used
> + for systems having a single GPIO to trigger a system poweroff.
> +
> +config TPL_POWEROFF_GPIO
> + bool "Enable support for GPIO poweroff driver in TPL"
> + depends on DM_GPIO && TPL
> + help
> + Support for system poweroff using a GPIO pin in TPL. This can be used
> + for systems having a single GPIO to trigger a system poweroff.
> +
> +config VPL_POWEROFF_GPIO
> + bool "Enable support for GPIO poweroff driver in VPL"
> + depends on DM_GPIO && VPL
> + help
> + Support for system poweroff using a GPIO pin in VPL. This can be used
> + for systems having a single GPIO to trigger a system poweroff.
> +
> config SYSRESET_GPIO
> bool "Enable support for GPIO reset driver"
> depends on DM_GPIO
> @@ -79,6 +100,30 @@ config SYSRESET_GPIO
> example on Microblaze where reset logic can be controlled via GPIO
> pin which triggers cpu reset.
>
> +config SPL_SYSRESET_GPIO
> + bool "Enable support for GPIO reset driver in SPL"
> + depends on DM_GPIO && SPL
> + help
> + Reset support via GPIO pin connected reset logic in SPL. This is used
> + for example on Microblaze where reset logic can be controlled via
> + GPIO pin which triggers cpu reset.
> +
> +config TPL_SYSRESET_GPIO
> + bool "Enable support for GPIO reset driver in TPL"
> + depends on DM_GPIO && TPL
> + help
> + Reset support via GPIO pin connected reset logic in TPL. This is used
> + for example on Microblaze where reset logic can be controlled via
> + GPIO pin which triggers cpu reset.
> +
> +config VPL_SYSRESET_GPIO
> + bool "Enable support for GPIO reset driver in VPL"
> + depends on DM_GPIO && VPL
> + help
> + Reset support via GPIO pin connected reset logic in VPL. This is used
> + for example on Microblaze where reset logic can be controlled via
> + GPIO pin which triggers cpu reset.
> +
> config SYSRESET_MAX77663
> bool "Enable support for MAX77663 PMIC System Reset"
> depends on DM_PMIC_MAX77663
> diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
> index 796fc9effa5..ded91a4d325 100644
> --- a/drivers/sysreset/Makefile
> +++ b/drivers/sysreset/Makefile
> @@ -8,8 +8,8 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
> obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
> obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
> obj-$(CONFIG_SYSRESET_CV1800B) += sysreset_cv1800b.o
> -obj-$(CONFIG_POWEROFF_GPIO) += poweroff_gpio.o
> -obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
> +obj-$(CONFIG_$(PHASE_)POWEROFF_GPIO) += poweroff_gpio.o
> +obj-$(CONFIG_$(PHASE_)SYSRESET_GPIO) += sysreset_gpio.o
> obj-$(CONFIG_$(PHASE_)SYSRESET_MAX77663) += sysreset_max77663.o
> obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
> obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
> --
> 2.43.0
>
I forgot to include maintainers of boards which are affected by this
patch. This expands the mailing list and v3 (if there will be one)
will correct this.
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