[PATCH v2 4/4] rockchip: sdram: Add fallback that fixup DRAM gaps on RK3588

Jonas Karlman jonas at kwiboo.se
Sat Apr 5 17:38:24 CEST 2025


RK3588 has two known memory gaps when using 16+ GiB DRAM,
[0x3fc000000, 0x3fc500000) and [0x3fff00000, 0x400000000).

The vendor TPL blob encodes this information in the DDR_MEM tag data
passed to later boot phases. U-Boot proper will normally use this
information to configure the DRAM banks.

When a DDR_MEM tag cannot be found the fallback is to use the entire
range above 4 GiB. Something that will cause issues when OS try to use
memory from the two known memory gaps.

Add a weak dram init banksize fixup function and implement it for RK3588
to fix issues observed when trying to RAM boot RK3588 boards with 16+
GiB DRAM into Linux.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
v2: New patch to fix booting into OS on RK3588 boards with 16+ GiB DRAM
---
 arch/arm/mach-rockchip/rk3588/rk3588.c | 27 ++++++++++++++++++++++++++
 arch/arm/mach-rockchip/sdram.c         |  7 ++++++-
 2 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index c1dce3ee3703..6395483f14f1 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -183,6 +183,33 @@ int arch_cpu_init(void)
 }
 #endif
 
+/*
+ * RK3588 has two known memory gaps when using 16+ GiB DRAM,
+ * [0x3fc000000, 0x3fc500000) and [0x3fff00000, 0x400000000).
+ *
+ * Remove the [0x3fc000000, 0x400000000) range to ensure OS does not
+ * use memory from these gaps when a DDR_MEM tag cannot be found.
+ */
+
+#define DRAM_GAP_START		0x3FC000000
+#define DRAM_GAP_END		0x400000000
+
+int rockchip_dram_init_banksize_fixup(struct bd_info *bd)
+{
+	size_t ram_top = bd->bi_dram[1].start + bd->bi_dram[1].size;
+
+	if (ram_top > DRAM_GAP_START) {
+		bd->bi_dram[1].size = DRAM_GAP_START - bd->bi_dram[1].start;
+
+		if (ram_top > DRAM_GAP_END && CONFIG_NR_DRAM_BANKS > 2) {
+			bd->bi_dram[2].start = DRAM_GAP_END;
+			bd->bi_dram[2].size = ram_top - bd->bi_dram[2].start;
+		}
+	}
+
+	return 0;
+}
+
 #define RK3588_OTP_CPU_CODE_OFFSET		0x02
 #define RK3588_OTP_SPECIFICATION_OFFSET		0x06
 
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index f7d32829295c..0bdda77a7926 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -287,6 +287,11 @@ static int rockchip_dram_init_banksize(void)
 }
 #endif
 
+__weak int rockchip_dram_init_banksize_fixup(struct bd_info *bd)
+{
+	return 0;
+}
+
 int dram_init_banksize(void)
 {
 	size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE);
@@ -340,7 +345,7 @@ int dram_init_banksize(void)
 #endif
 #endif
 
-	return 0;
+	return rockchip_dram_init_banksize_fixup(gd->bd);
 }
 
 size_t rockchip_sdram_size(phys_addr_t reg)
-- 
2.49.0



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