[PATCH v2 06/30] arm64: dts: rockchip: enable SCMI clk for RK3528 SoC

[Kever Yang]

On 2025/4/8 06:46, Jonas Karlman wrote:
> From: Chukun Pan <amadeus at jmu.edu.cn>
>
> Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK.
> Add SCMI clk for CPU, GPU and RNG will also use it.
>
> Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
> Link: https://lore.kernel.org/r/20250307100008.789129-2-amadeus@jmu.edu.cn
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
>
> [ upstream commit: fbcbc1fb93e14729bd87ab386b7f62694dcc8b51 ]
>
> (cherry picked from commit 6e03c7e28e2d929a420809a24b0379305a9fb86a)
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   dts/upstream/src/arm64/rockchip/rk3528.dtsi | 31 +++++++++++++++++++++
>   1 file changed, 31 insertions(+)
>
> diff --git a/dts/upstream/src/arm64/rockchip/rk3528.dtsi b/dts/upstream/src/arm64/rockchip/rk3528.dtsi
> index 0c0e7f151462..4be53868f324 100644
> --- a/dts/upstream/src/arm64/rockchip/rk3528.dtsi
> +++ b/dts/upstream/src/arm64/rockchip/rk3528.dtsi
> @@ -59,6 +59,7 @@
>   			reg = <0x0>;
>   			device_type = "cpu";
>   			enable-method = "psci";
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
>   		};
>   
>   		cpu1: cpu at 1 {
> @@ -66,6 +67,7 @@
>   			reg = <0x1>;
>   			device_type = "cpu";
>   			enable-method = "psci";
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
>   		};
>   
>   		cpu2: cpu at 2 {
> @@ -73,6 +75,7 @@
>   			reg = <0x2>;
>   			device_type = "cpu";
>   			enable-method = "psci";
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
>   		};
>   
>   		cpu3: cpu at 3 {
> @@ -80,6 +83,22 @@
>   			reg = <0x3>;
>   			device_type = "cpu";
>   			enable-method = "psci";
> +			clocks = <&scmi_clk SCMI_CLK_CPU>;
> +		};
> +	};
> +
> +	firmware {
> +		scmi: scmi {
> +			compatible = "arm,scmi-smc";
> +			arm,smc-id = <0x82000010>;
> +			shmem = <&scmi_shmem>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			scmi_clk: protocol at 14 {
> +				reg = <0x14>;
> +				#clock-cells = <1>;
> +			};
>   		};
>   	};
>   
> @@ -88,6 +107,18 @@
>   		method = "smc";
>   	};
>   
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		scmi_shmem: shmem at 10f000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0x0 0x0010f000 0x0 0x100>;
> +			no-map;
> +		};
> +	};
> +
>   	timer {
>   		compatible = "arm,armv8-timer";
>   		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,