[PATCH v2 2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence
neil.armstrong at linaro.org
neil.armstrong at linaro.org
Thu Apr 10 10:56:46 CEST 2025
On 10/04/2025 10:00, Sumit Garg wrote:
> From: Sumit Garg <sumit.garg at oss.qualcomm.com>
>
> Recent addition of support for SDM660 inadvertently broke USB PHY power
> on sequence on RB1/RB2 and others with following error:
>
> starting USB...
> Bus usb at 4e00000: QUSB2PHY pll lock failed: status reg = 0
> qcom-qusb2-phy phy at 1613000: PHY: Failed to power on phy at 1613000: -16.
> Can't power on PHY0
> probe failed, error -16
> No USB controllers found
>
> The root cause was the addition of flag se_clk_scheme_default which was
> configured correctly for SDM660 but incorrect for all other supported
> SoC. Fix that by properly assignment as per upstream Linux driver.
>
> Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
> Signed-off-by: Sumit Garg <sumit.garg at oss.qualcomm.com>
> ---
> drivers/phy/qcom/phy-qcom-qusb2.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
> index cabd05bf5a6..d98f6108e69 100644
> --- a/drivers/phy/qcom/phy-qcom-qusb2.c
> +++ b/drivers/phy/qcom/phy-qcom-qusb2.c
> @@ -230,6 +230,7 @@ static const struct qusb2_phy_cfg sm6115_phy_cfg = {
> .regs = sm6115_regs_layout,
>
> .has_pll_test = true,
> + .se_clk_scheme_default = true,
> .disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
> .mask_core_ready = PLL_LOCKED,
> .autoresume_en = BIT(3),
> @@ -256,6 +257,7 @@ static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
> POWER_DOWN),
> .mask_core_ready = CORE_READY_STATUS,
> .has_pll_override = true,
> + .se_clk_scheme_default = true,
> .autoresume_en = BIT(0),
> .update_tune1_with_efuse = true,
> };
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
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