[PATCH v3 13/22] passage: arm: Add the arch-specific standard passage impl

[Simon Glass]

Add implementations for 32- and 64-bit ARM.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v3:
- Update registers to match the Firmware Handoff protocol

Changes in v2:
- Add new patch with the arm-specific standard passage implementation

 arch/arm/cpu/armv7/cpu.c | 18 ++++++++++++++++++
 arch/arm/cpu/armv8/cpu.c | 19 +++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 8082f369ed6..f1b07c414de 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -17,6 +17,7 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <passage.h>
 #include <asm/system.h>
 #include <asm/cache.h>
 #include <asm/armv7.h>
@@ -87,3 +88,20 @@ void allow_unaligned(void)
 {
 	v7_arch_cp15_allow_unaligned();
 }
+
+void __noreturn arch_passage_entry(ulong entry_addr, ulong bloblist, ulong fdt)
+{
+	typedef void __noreturn (*passage_entry_t)(ulong zero1, ulong mach,
+						   ulong fdt, ulong bloblist);
+	passage_entry_t entry = (passage_entry_t)entry_addr;
+
+	/*
+	 * Register   Contents
+	 * r0         0
+	 * r1         010fb10b (indicates standard passage v1)
+	 * r2         Address of devicetree
+	 * r3         Address of bloblist
+	 * lr         Return address
+	 */
+	entry(0, passage_mach_version(), fdt, bloblist);
+}
diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c
index 82ecf02f4b0..275aa2501f1 100644
--- a/arch/arm/cpu/armv8/cpu.c
+++ b/arch/arm/cpu/armv8/cpu.c
@@ -13,6 +13,7 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <passage.h>
 #include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/secure.h>
@@ -99,3 +100,21 @@ void allow_unaligned(void)
 {
 	set_sctlr(get_sctlr() & ~CR_A);
 }
+
+void __noreturn arch_passage_entry(ulong entry_addr, ulong bloblist, ulong fdt)
+{
+	typedef void __noreturn (*passage_entry_t)(ulong fdt, ulong abi,
+						   ulong zero1, ulong bloblist,
+						   ulong zero2);
+	passage_entry_t entry = (passage_entry_t)entry_addr;
+
+	/*
+	 * Register   Contents
+	 * x0         Address of devicetree
+	 * x1         00000001_4a0fb10b (indicates standard passage v1)
+	 * x2         0
+	 * x3         Address of bloblist
+	 * x30        Return address
+	 */
+	entry(fdt, passage_mach_version(), 0, bloblist, 0);
+}
-- 
2.43.0