[PATCH v2] clk: fixed-rate: Use "clock-output-names" to name fixed clocks

[Fabio Estevam]

Hi Marek,

On Sun, Apr 20, 2025 at 4:20 PM Marek Vasut <marex at denx.de> wrote:

> Can you send that as a fix ?
>
> And also, fix this patch up and drop the bogus second half of the commit
> message and do a V3.

Sorry for the delay.

I found another issue on an imx8mm-evk board.

U-Boot SPL 2025.04-01379-g10f48365112b-dirty (Apr 24 2025 - 22:56:59 -0300)
No pmic
WDT:   Started watchdog at 30280000 with servicing every 1000ms (60s timeout)
SEC0:  RNG instantiated
Trying to boot from MMC1

(Pause here for about 3 seconds)

NOTICE:  Do not release JR0 to NS as it can be used by HAB
NOTICE:  BL31: v2.12.0(release):v2.12.0
NOTICE:  BL31: Built : 15:28:24, Apr 24 2025


U-Boot 2025.04-01379-g10f48365112b-dirty (Apr 24 2025 - 22:56:59 -0300)

CPU:   NXP i.MX8MMQ Rev1.0 A53 at 1200 MHz
CPU:   Consumer temperature grade (0C to 95C) at 37C
Model: FSL i.MX8MM EVK board
DRAM:  2 GiB
Core:  188 devices, 24 uclasses, devicetree: separate
WDT:   Started watchdog at 30280000 with servicing every 1000ms (60s timeout)
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Reading from MMC(1)... OK
In:    serial at 30890000
Out:   serial at 30890000
Err:   serial at 30890000
SEC0:  RNG instantiated
Net:   eth0: ethernet at 30be0000
Hit any key to stop autoboot:  0
u-boot=>

The issue above is the long pause after "Trying to boot from MMC1".

If I manually revert commit b4734c9c333b ("clk: imx: Convert
clock-osc-* back to osc_*"), then it boots normally, without the long
pause.

Applying your patch helped resolve the USB issue, but not the long pause issue.

Thanks