[PATCH v2] clk: fixed-rate: Use "clock-output-names" to name fixed clocks

[Marek Vasut]

On 4/25/25 2:55 PM, Fabio Estevam wrote:
> On Thu, Apr 24, 2025 at 11:35 PM Fabio Estevam <festevam at gmail.com> wrote:
> 
>> I haven't had a chance to debug this issue yet.
> 
> I applied this debug patch:
> 
> --- a/drivers/mmc/fsl_esdhc_imx.c
> +++ b/drivers/mmc/fsl_esdhc_imx.c
> @@ -1539,6 +1539,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
>          }
> 
>          priv->sdhc_clk = clk_get_rate(&priv->per_clk);
> +       printf("****** sdhc clk is %d\n", priv->sdhc_clk);
>   #else
>          init_clk_usdhc(dev_seq(dev));
> 
> With the top-of-tree U-Boot, SPL calculates the wrong sdhc_clk on the
> imx8mm-evk:
> 
> U-Boot SPL 2025.04-01380-ga9820e12db18-dirty (Apr 25 2025 - 09:40:45 -0300)
> No pmic
> WDT:   Started watchdog at 30280000 with servicing every 1000ms (60s timeout)
> SEC0:  RNG instantiated
> Trying to boot from MMC1
> ****** sdhc clk is 204522251

Look at cmd/clk.c and import soc_clk_dump() into this driver, and then 
call it here, so you would get the current topology of the clock tree. 
What do you see there in the output ? Please include it here.