[PATCH v2 3/6] arm64: dts: rockchip: enable pcie on Sige5

[Kever Yang]

On 2025/7/12 06:44, Jonas Karlman wrote:
> From: Nicolas Frattaroli <nicolas.frattaroli at collabora.com>
>
> The ArmSoM Sige5 board exposes PCIe controller 0 on its M.2 slot on the
> bottom of the board. Enable the necessary nodes for it, and also add the
> correct pins for both the power enable GPIO and the PCIe reset GPIO.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli at collabora.com>
> Link: https://lore.kernel.org/r/20250414-rk3576-sige5-pcie-v1-1-0e950a96f392@collabora.com
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
>
> [ upstream commit: 34b69113ab975e8718b24b9b2cd4b1ea8dc107d8 ]
>
> (cherry picked from commit c88c9d3b42f790289d95ecfa73d196e641de30bd)
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v2: New patch
> ---
>   .../arm64/rockchip/rk3576-armsom-sige5.dts    | 23 +++++++++++++++++++
>   1 file changed, 23 insertions(+)
>
> diff --git a/dts/upstream/src/arm64/rockchip/rk3576-armsom-sige5.dts b/dts/upstream/src/arm64/rockchip/rk3576-armsom-sige5.dts
> index 314067ba6f3c..570252c4c0bf 100644
> --- a/dts/upstream/src/arm64/rockchip/rk3576-armsom-sige5.dts
> +++ b/dts/upstream/src/arm64/rockchip/rk3576-armsom-sige5.dts
> @@ -117,6 +117,8 @@
>   
>   	vcc_3v3_pcie: regulator-vcc-3v3-pcie {
>   		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pcie_pwr_en>;
>   		regulator-name = "vcc_3v3_pcie";
>   		regulator-min-microvolt = <3300000>;
>   		regulator-max-microvolt = <3300000>;
> @@ -177,6 +179,10 @@
>   	};
>   };
>   
> +&combphy0_ps {
> +	status = "okay";
> +};
> +
>   &cpu_l0 {
>   	cpu-supply = <&vdd_cpu_lit_s0>;
>   };
> @@ -634,6 +640,14 @@
>   	};
>   };
>   
> +&pcie0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie_reset>;
> +	reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
> +	vpcie3v3-supply = <&vcc_3v3_pcie>;
> +	status = "okay";
> +};
> +
>   &pinctrl {
>   	headphone {
>   		hp_det: hp-det {
> @@ -655,6 +669,15 @@
>   			rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
>   		};
>   	};
> +
> +	pcie {
> +		pcie_pwr_en: pcie-pwr-en {
> +			rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_down>;
> +		};
> +		pcie_reset: pcie-reset {
> +			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
> +		};
> +	};
>   };
>   
>   &sdhci {