[PATCH v2 2/6] arm64: dts: rockchip: fix rk3576 pcie unit addresses
Kever Yang
kever.yang at rock-chips.com
Sat Aug 30 16:45:20 CEST 2025
On 2025/7/12 06:44, Jonas Karlman wrote:
> From: Heiko Stuebner <heiko at sntech.de>
>
> The rk3576 pcie nodes currently use the apb register as their unit address
> which is the second reg area defined in the binding.
>
> As can be seen by the dtc warnings like
>
> ../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1346.24-1398.5: Warning (simple_bus_reg): /soc/pcie at 2a200000: simple-bus unit address format error, expected "22000000"
> ../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1400.24-1452.5: Warning (simple_bus_reg): /soc/pcie at 2a210000: simple-bus unit address format error, expected "22400000"
>
> using the first reg area as the unit address seems to be preferred.
> This is the dbi area per the binding, so adapt the unit address accordingly
> and move the nodes to their new position.
>
> Reported-by: kernel test robot <lkp at intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202505150745.PQT9TLYX-lkp@intel.com/
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> Link: https://lore.kernel.org/r/20250518220449.2722673-2-heiko@sntech.de
>
> [ upstream commit: 4d2587e0e1ce7145a38802fa281f4f1f411ec56f ]
>
> (cherry picked from commit 83e4382f7a80a67f9b247f433d67f6124256707a)
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> v2: New patch
> ---
> dts/upstream/src/arm64/rockchip/rk3576.dtsi | 216 ++++++++++----------
> 1 file changed, 108 insertions(+), 108 deletions(-)
>
> diff --git a/dts/upstream/src/arm64/rockchip/rk3576.dtsi b/dts/upstream/src/arm64/rockchip/rk3576.dtsi
> index ce8bcab215c0..0fca84fb60d5 100644
> --- a/dts/upstream/src/arm64/rockchip/rk3576.dtsi
> +++ b/dts/upstream/src/arm64/rockchip/rk3576.dtsi
> @@ -450,6 +450,114 @@
> #size-cells = <2>;
> ranges;
>
> + pcie0: pcie at 22000000 {
> + compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";
> + reg = <0x0 0x22000000 0x0 0x00400000>,
> + <0x0 0x2a200000 0x0 0x00010000>,
> + <0x0 0x20000000 0x0 0x00100000>;
> + reg-names = "dbi", "apb", "config";
> + bus-range = <0x0 0xf>;
> + clocks = <&cru ACLK_PCIE0_MST>, <&cru ACLK_PCIE0_SLV>,
> + <&cru ACLK_PCIE0_DBI>, <&cru PCLK_PCIE0>,
> + <&cru CLK_PCIE0_AUX>;
> + clock-names = "aclk_mst", "aclk_slv",
> + "aclk_dbi", "pclk",
> + "aux";
> + device_type = "pci";
> + interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &pcie0_intc 0>,
> + <0 0 0 2 &pcie0_intc 1>,
> + <0 0 0 3 &pcie0_intc 2>,
> + <0 0 0 4 &pcie0_intc 3>;
> + linux,pci-domain = <0>;
> + max-link-speed = <2>;
> + num-ib-windows = <8>;
> + num-viewport = <8>;
> + num-ob-windows = <2>;
> + num-lanes = <1>;
> + phys = <&combphy0_ps PHY_TYPE_PCIE>;
> + phy-names = "pcie-phy";
> + power-domains = <&power RK3576_PD_PHP>;
> + ranges = <0x01000000 0x0 0x20100000 0x0 0x20100000 0x0 0x00100000
> + 0x02000000 0x0 0x20200000 0x0 0x20200000 0x0 0x00e00000
> + 0x03000000 0x9 0x00000000 0x9 0x00000000 0x0 0x80000000>;
> + resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>;
> + reset-names = "pwr", "pipe";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + status = "disabled";
> +
> + pcie0_intc: legacy-interrupt-controller {
> + interrupt-controller;
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
> + };
> + };
> +
> + pcie1: pcie at 22400000 {
> + compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";
> + reg = <0x0 0x22400000 0x0 0x00400000>,
> + <0x0 0x2a210000 0x0 0x00010000>,
> + <0x0 0x21000000 0x0 0x00100000>;
> + reg-names = "dbi", "apb", "config";
> + bus-range = <0x20 0x2f>;
> + clocks = <&cru ACLK_PCIE1_MST>, <&cru ACLK_PCIE1_SLV>,
> + <&cru ACLK_PCIE1_DBI>, <&cru PCLK_PCIE1>,
> + <&cru CLK_PCIE1_AUX>;
> + clock-names = "aclk_mst", "aclk_slv",
> + "aclk_dbi", "pclk",
> + "aux";
> + device_type = "pci";
> + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &pcie1_intc 0>,
> + <0 0 0 2 &pcie1_intc 1>,
> + <0 0 0 3 &pcie1_intc 2>,
> + <0 0 0 4 &pcie1_intc 3>;
> + linux,pci-domain = <0>;
> + max-link-speed = <2>;
> + num-ib-windows = <8>;
> + num-viewport = <8>;
> + num-ob-windows = <2>;
> + num-lanes = <1>;
> + phys = <&combphy1_psu PHY_TYPE_PCIE>;
> + phy-names = "pcie-phy";
> + power-domains = <&power RK3576_PD_SUBPHP>;
> + ranges = <0x01000000 0x0 0x21100000 0x0 0x21100000 0x0 0x00100000
> + 0x02000000 0x0 0x21200000 0x0 0x21200000 0x0 0x00e00000
> + 0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x80000000>;
> + resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>;
> + reset-names = "pwr", "pipe";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + status = "disabled";
> +
> + pcie1_intc: legacy-interrupt-controller {
> + interrupt-controller;
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>;
> + };
> + };
> +
> usb_drd0_dwc3: usb at 23000000 {
> compatible = "rockchip,rk3576-dwc3", "snps,dwc3";
> reg = <0x0 0x23000000 0x0 0x400000>;
> @@ -1240,114 +1348,6 @@
> reg = <0x0 0x27f22100 0x0 0x20>;
> };
>
> - pcie0: pcie at 2a200000 {
> - compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";
> - reg = <0x0 0x22000000 0x0 0x00400000>,
> - <0x0 0x2a200000 0x0 0x00010000>,
> - <0x0 0x20000000 0x0 0x00100000>;
> - reg-names = "dbi", "apb", "config";
> - bus-range = <0x0 0xf>;
> - clocks = <&cru ACLK_PCIE0_MST>, <&cru ACLK_PCIE0_SLV>,
> - <&cru ACLK_PCIE0_DBI>, <&cru PCLK_PCIE0>,
> - <&cru CLK_PCIE0_AUX>;
> - clock-names = "aclk_mst", "aclk_slv",
> - "aclk_dbi", "pclk",
> - "aux";
> - device_type = "pci";
> - interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 7>;
> - interrupt-map = <0 0 0 1 &pcie0_intc 0>,
> - <0 0 0 2 &pcie0_intc 1>,
> - <0 0 0 3 &pcie0_intc 2>,
> - <0 0 0 4 &pcie0_intc 3>;
> - linux,pci-domain = <0>;
> - max-link-speed = <2>;
> - num-ib-windows = <8>;
> - num-viewport = <8>;
> - num-ob-windows = <2>;
> - num-lanes = <1>;
> - phys = <&combphy0_ps PHY_TYPE_PCIE>;
> - phy-names = "pcie-phy";
> - power-domains = <&power RK3576_PD_PHP>;
> - ranges = <0x01000000 0x0 0x20100000 0x0 0x20100000 0x0 0x00100000
> - 0x02000000 0x0 0x20200000 0x0 0x20200000 0x0 0x00e00000
> - 0x03000000 0x9 0x00000000 0x9 0x00000000 0x0 0x80000000>;
> - resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>;
> - reset-names = "pwr", "pipe";
> - #address-cells = <3>;
> - #size-cells = <2>;
> - status = "disabled";
> -
> - pcie0_intc: legacy-interrupt-controller {
> - interrupt-controller;
> - #address-cells = <0>;
> - #interrupt-cells = <1>;
> - interrupt-parent = <&gic>;
> - interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
> - };
> - };
> -
> - pcie1: pcie at 2a210000 {
> - compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";
> - reg = <0x0 0x22400000 0x0 0x00400000>,
> - <0x0 0x2a210000 0x0 0x00010000>,
> - <0x0 0x21000000 0x0 0x00100000>;
> - reg-names = "dbi", "apb", "config";
> - bus-range = <0x20 0x2f>;
> - clocks = <&cru ACLK_PCIE1_MST>, <&cru ACLK_PCIE1_SLV>,
> - <&cru ACLK_PCIE1_DBI>, <&cru PCLK_PCIE1>,
> - <&cru CLK_PCIE1_AUX>;
> - clock-names = "aclk_mst", "aclk_slv",
> - "aclk_dbi", "pclk",
> - "aux";
> - device_type = "pci";
> - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 7>;
> - interrupt-map = <0 0 0 1 &pcie1_intc 0>,
> - <0 0 0 2 &pcie1_intc 1>,
> - <0 0 0 3 &pcie1_intc 2>,
> - <0 0 0 4 &pcie1_intc 3>;
> - linux,pci-domain = <0>;
> - max-link-speed = <2>;
> - num-ib-windows = <8>;
> - num-viewport = <8>;
> - num-ob-windows = <2>;
> - num-lanes = <1>;
> - phys = <&combphy1_psu PHY_TYPE_PCIE>;
> - phy-names = "pcie-phy";
> - power-domains = <&power RK3576_PD_SUBPHP>;
> - ranges = <0x01000000 0x0 0x21100000 0x0 0x21100000 0x0 0x00100000
> - 0x02000000 0x0 0x21200000 0x0 0x21200000 0x0 0x00e00000
> - 0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x80000000>;
> - resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>;
> - reset-names = "pwr", "pipe";
> - #address-cells = <3>;
> - #size-cells = <2>;
> - status = "disabled";
> -
> - pcie1_intc: legacy-interrupt-controller {
> - interrupt-controller;
> - #address-cells = <0>;
> - #interrupt-cells = <1>;
> - interrupt-parent = <&gic>;
> - interrupts = <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>;
> - };
> - };
> -
> gmac0: ethernet at 2a220000 {
> compatible = "rockchip,rk3576-gmac", "snps,dwmac-4.20a";
> reg = <0x0 0x2a220000 0x0 0x10000>;
More information about the U-Boot
mailing list