[PATCHv2 1/1] corstone1000: Add Cortex-A320 support on FVP

[Tom Rini]

On Mon, Dec 01, 2025 at 09:04:22AM +0000, Frazer Carsley wrote:

> Enable Cortex-A320 support on the Corstone-1000 platform
> (including FVP) and update the device tree to support the integrated
> Ethos-U85 NPU and GIC-600 interrupt controller. These updates make
> the platform fully compatible with Cortex-A320 while retaining
> backward compatibility with Cortex-A35 and GIC-400.
> 
> **Cortex-A320 enablement**
> 
> * Extend Corstone-1000 compatibility list to include `cortex-a320`.
> * Ensure build and device-tree logic support both Cortex-A35 and
>   Cortex-A320 configurations.
> 
> **Ethos-U85 integration**
> 
> * Add `/ethosu at 1a050000` node describing the NPU register block at
>   `0x1A050000`.
> * Introduce associated reserved memory regions:
>   * `ethosu_sram at 02400000`: 2 MiB on-chip SRAM (`no-map`).
>   * `ethosu_reserved at A0000000`: 32 MiB DDR carve-out
>      (`shared-dma-pool`).
> * Connect memory regions through `memory-region` and `sram` phandles.
> * Add `dma-ranges`, interrupt spec, `region-cfgs`, `cs-region`, and
>   `ethosu-mem-config` for full driver support.
> * Enable the NPU node conditionally via `CONFIG_ETHOS_U85`.
> 
> **GICv3/GIC-600 support**
> 
> * Introduce `CONFIG_GIC_V3` to toggle between GIC-400 (v2) and
>   GIC-600 (v3).
> * Add full GICv3 node guarded by `#ifdef CONFIG_GIC_V3`.
> * Adjust `cpu at 1..3` `reg` values to `0x100/0x200/0x300` under
>   GICv3 (keep `0x1/0x2/0x3` for GIC-400).
> * Update Ethos-U85 interrupt assignment to **SPI 16** to align with
>   the new interrupt map.
> 
> These updates align the Corstone-1000 platform with Arm’s latest
> Cortex-A320 and Ethos-U85 configurations and ensure proper interrupt
> and memory mapping for both secure and non-secure domains.
> 
> Signed-off-by: Frazer Carsley <frazer.carsley at arm.com>
> Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal at arm.com>
[snip]
> diff --git a/board/armltd/corstone1000/Kconfig b/board/armltd/corstone1000/Kconfig
> index 709674d4cf7..9476d64d0b0 100644
> --- a/board/armltd/corstone1000/Kconfig
> +++ b/board/armltd/corstone1000/Kconfig
> @@ -9,4 +9,11 @@ config SYS_VENDOR
>  config SYS_CONFIG_NAME
>  	default "corstone1000"
>  
> +config ETHOS_U85
> +	bool "Enable Arm Ethos-U85 NPU support"
> +	default n
> +
> +config GIC_V3
> +	bool "Enable GIC v3 support"
> +	default n
>  endif

The first, small thing is that "default n" is default, so those lines
should go away. The bigger thing is that we will soon enough be seeing
code to support these options I assume? And I don't know how broadly
ETHOS_U85 will apply to other designs, we have things related to GIC_V3
elsewhere, and so I think this symbol belongs somewhere else, probably
arch/arm/Kconfig near the other GIC*V3 options (inconsistent naming
today) and maybe should just be GIC_V3_ITS once used?

-- 
Tom
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