[PATCH 2/2] imx: Support i.MX91 11x11 FRDM board

Peng Fan peng.fan at nxp.com
Tue Dec 2 04:36:13 CET 2025


> Subject: Re: [PATCH 2/2] imx: Support i.MX91 11x11 FRDM board
> 
> Hi Peng,
> 
> On Mon, Dec 1, 2025 at 11:36 PM Peng Fan <peng.fan at nxp.com>
> wrote:
> 
> > With ECC enabled, some DRAM space needs to be reserved to store
> ECC.
> > With ECC disabled, no need to reserve DRAM space for ECC area.
> 
> Thanks for the clarification. How large does the ECC area need to be?

It is auto calculated by reading the DDR settings, for 2GB DRAM, it
is about 128MB? I could not recall clearly.

__weak int board_phys_sdram_size(phys_size_t *size)                                                 
{                                                                                                   
        phys_size_t start, end;                                                                     
        phys_size_t val;                                                                            
                                                                                                    
        if (!size)                                                                                  
                return -EINVAL;                                                                     
                                                                                                    
        val = readl(REG_DDR_CS0_BNDS);                                                              
        start = (val >> 16) << 24;                                                                  
        end   = (val & 0xFFFF);                                                                     
        end   = end ? end + 1 : 0;                                                                  
        end   = end << 24;                                                                          
        *size = end - start;                                                                        
                                                                                                    
        val = readl(REG_DDR_CS1_BNDS);                                                              
        start = (val >> 16) << 24;                                                                  
        end   = (val & 0xFFFF);                                                                     
        end   = end ? end + 1 : 0;                                                                  
        end   = end << 24;                                                                          
        *size += end - start;                                                                       
                                                                                                    
        return 0;


Regards
Peng.

> 
> Joseph,
> 
> Please add this explanation to the board's README to help users select
> the more appropriate defconfig for their use case.
> 
> Thank


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