[PATCH 1/2] RISC-V: implement private GCC library

[Icenowy Zheng]

在 2025-12-02星期二的 03:57 +0000，Yao Zi写道：
> On Mon, Dec 01, 2025 at 06:49:03PM +0100, Heinrich Schuchardt wrote:
> > The following functions are provided:
> > 
> > Count leading zero bits
> > 
> > * int __clzsi2 (unsigned int a)
> > * int __clzdi2 (unsigned long a)
> > * int __clzti2 (unsigned long long a)
> > 
> > Count trailing zero bits
> > 
> > * int __ctzsi2 (unsigned int a)
> > * int __ctzdi2 (unsigned long a)
> > * int __ctzti2 (unsigned long long a)
> > 
> > Signed-off-by: Heinrich Schuchardt
> > <heinrich.schuchardt at canonical.com>
> > ---
> 
> I noted there's another series with the same subject[1] sent almost
> at
> the same time, and I couldn't tell the difference at the first
> glance.
> Is this an incident?
> 
> >  arch/Kconfig            |   1 +
> >  arch/riscv/lib/Makefile |   2 +
> >  arch/riscv/lib/clz.c    | 105
> > ++++++++++++++++++++++++++++++++++++++++
> >  arch/riscv/lib/ctz.c    |  95 ++++++++++++++++++++++++++++++++++++
> >  lib/Kconfig             |   2 +-
> >  5 files changed, 204 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/riscv/lib/clz.c
> >  create mode 100644 arch/riscv/lib/ctz.c
> > 
> > diff --git a/arch/Kconfig b/arch/Kconfig
> > index 3133f892f94..4af0da2485f 100644
> > --- a/arch/Kconfig
> > +++ b/arch/Kconfig
> > @@ -159,6 +159,7 @@ config PPC
> >  config RISCV
> >         bool "RISC-V architecture"
> >         select CREATE_ARCH_SYMLINK
> > +       select HAVE_PRIVATE_LIBGCC if 64BIT
> 
> Are 32-bit platforms excluded for lacking of enough library
> functions?
> Should we exclude !RISCV_ISA_F || !RISCV_ISA_D platforms as well?
> Though
> there's no in-tree 64-bit port without F/D extension.

The S7 core in U74-MC complex seems to have only IMAC, no F/D.

> 
> >         select HAVE_SETJMP
> >         select HAVE_INITJMP
> >         select SUPPORT_ACPI
> 
> Regards,
> Yao Zi
> 
> [1]:
> https://lore.kernel.org/u-boot/20251201174705.652626-1-zfsdt@canonical.com/