[PATCH v4] SDRAM Calibration Failed fix for GEN5 SoCFPGA

[Sune Brian]

Ralph Siemsen <ralph.siemsen at linaro.org> 於 2025年12月4日週四 上午2:01寫道：
>
> Hi Brian,
>
> On Mon, Dec 1, 2025 at 8:24 AM Sune Brian <briansune at gmail.com> wrote:
> > I am enclosing a bit log here.
> > I had diff both sequencer on mainstream and altera trunk.
> > No diff.
> >
> > As for the sdram_gen5.c there are diff but no major point
> > before calibration fail is trigger. ECC is not use or setup.
> >
> > Setup:
> > No CYCLIC no WDT all off on dts and .config.
> > No modification on code.
>
> I had similar problem on a custom board with cyclone V. I tried
> disabling the watchdog but this didn't make any difference.

Hi Ralph,

But did you disable also all "CYCLIC" as well?

>
> After bisecting, I traced it to commit 3b8dfc42a23 which changed
> CONFIG_SYS_TIMER_COUNTS_DOWN into a real Kconfig symbol. Although this

1) If my memory recall correctly just after this week bundle merge of GEN5.
The issue cont'd exist after disable all WDT CYCLIC etc.

2) This is still a bit contradict what T.F. mentioned.
If anything that is related to the time or counter then the original
susception holds.

3) I use socfpga_cyclone5_defconfig and only change minimum settings
that I needs.
>From this issue mentioned to current day.

> was updated in socfpga_cyclone5_defconfig, I had to make the same
> change in my defconfig.
>
> Not sure if this is your problem too, but worth checking, particularly
> if you're using a custom defconfig.
>
> Regards,
> Ralph

Still thank you and I will check.

Brian