[GIT PULL] u-boot-riscv/next

[Leo Liang]

Hi Tom,

The following changes since commit 8e12d6ccb3cfa84dd275a1b852b2a235de0162b0:

  Merge patch series "Azure: Rework world build to directly use the container" (2025-12-07 12:53:09 -0600)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git next

for you to fetch changes up to 2da2c01cd1238e210009c4aea5d429bea431754d:

  configs: starfive: enable wget https (2025-12-08 12:11:06 +0800)

CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/28674
----------------------------------------------------------------
- riscv: Implement private GCC library
- mpfs: Add MPFS CPU Implementation
- andes: Stop disabling device tree relocation and some minor fixes
- sifive: Stop disabling device tree relocation
- starfive: Cleanup size types and typos
----------------------------------------------------------------
Che-Wei Chuang (1):
      configs: Change default baud rate to 115200

Conor Dooley (2):
      riscv: create a custom CPU implementation for PolarFire SoC
      riscv: mpfs: move SoC level options to the CPU Kconfig

E Shattow (4):
      ram: starfive: drop references to 16GB memory size
      ram: starfive: use SZ_8G for 8GB memory size
      ram: starfive: fix typo for unsupported DDR size
      configs: starfive: enable wget https

Heinrich Schuchardt (2):
      RISC-V: implement private GCC library
      test: provide unit tests for the RISC-V private GCC library

Leo Yu-Chi Liang (1):
      riscv: cpu: Beautify the warning message

Randolph (1):
      falcon: support booting linux from MMC/Parallel Flash

Tom Rini (2):
      ae350: Stop disabling device tree relocation
      sifive-unleashed: Stop disabling device tree relocation

 arch/Kconfig                            |   1 +
 arch/riscv/Kconfig                      |   1 +
 arch/riscv/cpu/cpu.c                    |   2 +-
 arch/riscv/cpu/mpfs/Kconfig             |  33 ++++++++++
 arch/riscv/cpu/mpfs/Makefile            |   5 ++
 arch/riscv/cpu/mpfs/dram.c              |  38 ++++++++++++
 arch/riscv/dts/ae350_32.dts             |   4 +-
 arch/riscv/dts/ae350_64.dts             |   4 +-
 arch/riscv/include/asm/arch-mpfs/clk.h  |   8 +++
 arch/riscv/lib/Makefile                 |   2 +
 arch/riscv/lib/clz.c                    | 105 ++++++++++++++++++++++++++++++++
 arch/riscv/lib/ctz.c                    |  95 +++++++++++++++++++++++++++++
 board/microchip/mpfs_generic/Kconfig    |  24 +-------
 common/spl/Kconfig                      |   1 +
 configs/ae350_rv32_defconfig            |   2 +-
 configs/ae350_rv32_falcon_defconfig     |   2 +-
 configs/ae350_rv32_falcon_xip_defconfig |   5 +-
 configs/ae350_rv32_spl_defconfig        |   2 +-
 configs/ae350_rv32_spl_xip_defconfig    |   2 +-
 configs/ae350_rv32_xip_defconfig        |   2 +-
 configs/ae350_rv64_defconfig            |   2 +-
 configs/ae350_rv64_falcon_defconfig     |   2 +-
 configs/ae350_rv64_falcon_xip_defconfig |   5 +-
 configs/ae350_rv64_spl_defconfig        |   2 +-
 configs/ae350_rv64_spl_xip_defconfig    |   2 +-
 configs/ae350_rv64_xip_defconfig        |   2 +-
 configs/starfive_visionfive2_defconfig  |   2 +
 drivers/ram/starfive/ddrcsr_boot.c      |   3 -
 drivers/ram/starfive/ddrphy_start.c     |   1 -
 drivers/ram/starfive/starfive_ddr.c     |   5 +-
 drivers/ram/starfive/starfive_ddr.h     |   1 -
 include/configs/ae350.h                 |   1 -
 include/configs/sifive-unleashed.h      |   1 -
 lib/Kconfig                             |   2 +-
 test/lib/Makefile                       |   4 ++
 test/lib/test_clz.c                     |  53 ++++++++++++++++
 test/lib/test_ctz.c                     |  53 ++++++++++++++++
 37 files changed, 427 insertions(+), 52 deletions(-)
 create mode 100644 arch/riscv/cpu/mpfs/Kconfig
 create mode 100644 arch/riscv/cpu/mpfs/Makefile
 create mode 100644 arch/riscv/cpu/mpfs/dram.c
 create mode 100644 arch/riscv/include/asm/arch-mpfs/clk.h
 create mode 100644 arch/riscv/lib/clz.c
 create mode 100644 arch/riscv/lib/ctz.c
 create mode 100644 test/lib/test_clz.c
 create mode 100644 test/lib/test_ctz.c

 Best regards,
 Leo