[PATCH] xilinx: mbv32: Disable floating point

Michal Simek michal.simek at amd.com
Wed Dec 10 08:42:32 CET 2025



On 12/3/25 08:20, Michal Simek wrote:
> MB-V 32 has optional single precision FPU (64bit has single and double
> precision FPU) but there is no use and reason to enable FPU by default
> that's why disable it.
> 
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
> 
>   configs/xilinx_mbv32_defconfig | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig
> index 88d9e5ce6b2b..81c0f8e9e936 100644
> --- a/configs/xilinx_mbv32_defconfig
> +++ b/configs/xilinx_mbv32_defconfig
> @@ -18,6 +18,7 @@ CONFIG_SYS_CLK_FREQ=100000000
>   CONFIG_BOOT_SCRIPT_OFFSET=0x0
>   CONFIG_DEBUG_UART=y
>   CONFIG_TARGET_XILINX_MBV=y
> +# CONFIG_RISCV_ISA_F is not set
>   # CONFIG_SPL_SMP is not set
>   CONFIG_REMAKE_ELF=y
>   CONFIG_FIT=y

Applied.
M


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