[PATCH v2 4/9] mmc: sdhci-cadence: Set controller and PHY speed modes for SD and eMMC cards

[Peng Fan]

On Wed, Dec 03, 2025 at 04:21:34AM -0800, Tanmay Kathpalia wrote:
>Replace the legacy clock frequency-based timing mode selection with
>proper MMC timing mode constants.
>
>Changes to sdhci-cadence.c:
>- Add sdhci_cdns_get_hrs06_mode() helper function for mode selection
>- Replace clock frequency logic with mmc->selected_mode switch statement
>- Use proper MMC timing constants (MMC_HS, UHS_SDR104, etc.)
>- Add SD card specific handling with standard SDHCI control register setup
>
>Changes to sdhci-cadence6.c:
>- Add SD high speed PHY and control configuration arrays
>- Update sdhci_cdns6_phy_adj() to use timing modes instead of HRS06 modes
>- Support both SD and eMMC timing modes with appropriate PHY settings
>
>Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia at altera.com>
>Reviewed-by: Balsundar Ponnusamy <balsundar.ponnusamy at altera.com>

Reviewed-by: Peng Fan <peng.fan at nxp.com>