[PATCH v2 2/2] clk: mediatek: add MT8188 clock driver

[David Lechner]

On 12/11/25 11:55 AM, David Lechner wrote:

...

> PLL clocks
> ----------
> 
> This is just a guess, but I suspect in Linux, since CLK_TOP_ADSPPL is
> just a 1:1 divider clock of CLK_APMIXED_ADSPPLL, they took the shortcut
> of leaving out CLK_TOP_ADSPPL from the clock tree and set the parent
> of CLK_TOP_ADSPPLL_Dx to CLK_APMIXED_ADSPPLL instead of CLK_TOP_ADSPPLL.
> 
> The actual full picture should be like this:
> 
> 	77, /* CLK_TOP_ADSPPLL */
> 
> 	...
> 
> 	FACTOR0(CLK_TOP_ADSPPL, CLK_APMIXED_ADSPPLL, 1, 1),
> 	FACTOR0(CLK_TOP_ADSPPLL_D2, CLK_TOP_ADSPPL, 1, 2),
> 	FACTOR0(CLK_TOP_ADSPPLL_D4, CLK_TOP_ADSPPL, 1, 4),
> 	FACTOR0(CLK_TOP_ADSPPLL_D8, CLK_TOP_ADSPPL, 1, 8),

Correction:

 	FACTOR0(CLK_TOP_ADSPPL, CLK_APMIXED_ADSPPLL, 1, 1),
 	FACTOR1(CLK_TOP_ADSPPLL_D2, CLK_TOP_ADSPPL, 1, 2),
 	FACTOR1(CLK_TOP_ADSPPLL_D4, CLK_TOP_ADSPPL, 1, 4),
 	FACTOR1(CLK_TOP_ADSPPLL_D8, CLK_TOP_ADSPPL, 1, 8),

FACTOR0() means the 2nd argument is a APMIXED clock ID and
FACTOR1() means the 2nd argument is a TOPCKGEN clock ID.

> 
> Instead of:
> 	
> 	-1, /* CLK_TOP_ADSPPLL */
> 
> 	...
> 
> 	FACTOR0(CLK_TOP_ADSPPLL_D2, CLK_APMIXED_ADSPPLL, 1, 2),
> 	FACTOR0(CLK_TOP_ADSPPLL_D4, CLK_APMIXED_ADSPPLL, 1, 4),
> 	FACTOR0(CLK_TOP_ADSPPLL_D8, CLK_APMIXED_ADSPPLL, 1, 8),
> 
> So we could either follow Linux and use CLK_APMIXED_ADSPPLL everywhere
> instead of adding CLK_TOP_ADSPPL. Or we could be more correct and add
> the missing clocks.
>