[PATCH 2/3] spi: stm32-qspi: Increase read throughput in indirect mode

Patrice Chotard patrice.chotard at foss.st.com
Tue Dec 16 16:31:53 CET 2025


When WATCHDOG_RESET() was replaced by schedule() in commit
29caf9305b6f ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
we not only reset the watchdog but also call the cyclic infrastructure
which takes time and has impact on read accesses performances.

Move schedule() from _stm32_qspi_read_fifo() to _stm32_qspi_poll()
and call schedule() only every 1MB chunk of data.

Test performed by reading 64MB on sNOR on stm32mp157c-ev1 board:

          before      after    ratio
Read  :  201 KB/s    520KB/s   +258%

Signed-off-by: Patrice Chotard <patrice.chotard at foss.st.com>
---
 drivers/spi/stm32_qspi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 3216ec8010e..1778f8c1458 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -165,7 +165,6 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv,
 static void _stm32_qspi_read_fifo(u8 *val, void __iomem *addr)
 {
 	*val = readb(addr);
-	schedule();
 }
 
 static void _stm32_qspi_write_fifo(u8 *val, void __iomem *addr)
@@ -200,6 +199,9 @@ static int _stm32_qspi_poll(struct stm32_qspi_priv *priv,
 		}
 
 		fifo(buf++, &priv->regs->dr);
+
+		if (!(len % SZ_1M))
+			schedule();
 	}
 
 	return 0;

-- 
2.43.0



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