[GIT PULL] AMD/Xilinx changes for 2026.04-rc1

[Michal Simek]

Hi Tom,

it is time to cleanup my queue. I can't see any issue in CI. I hope that 
removing cdns,is-dma property again is not going to cause issues on other 
platforms that's why I want to also get it to next sooner rather then later.

There are multiple patches related to UFS which have been sent and also some 
other platform related one that's why I expect another pull request for rc1 in 
future.

Thanks,
Michal


The following changes since commit 930eff5416ea98ebd09cec73f5d06a7033b4d52e:

   Merge tag 'u-boot-socfpga-next-20251217' of 
https://source.denx.de/u-boot/custodians/u-boot-socfpga into next (2025-12-18 
08:06:10 -0600)

are available in the Git repository at:

   https://source.denx.de/u-boot/custodians/u-boot-microblaze.git 
tags/xilinx-for-v2026.04-rc1

for you to fetch changes up to 0b880fc95dbaed88dd55060730857b8f52765c57:

   arch/arm/mach-zynqmp: configure default BL32_LOAD_ADDR (2025-12-19 10:57:58 
+0100)

----------------------------------------------------------------
AMD/Xilinx/FPGA changes for v2026.04-rc1

xilinx:
- Sync ESRT with detected GUID
- DT cleanups
- Add logic for FRU information multiple times
- Enable more drivers pca9541, usb5744
- Enable more commands
- Cleanup firmware DT bindings

firmware:
- Add enhancement SMC format support

clk/versal:
- Various cleanups
- Add support for Versal Gen 2

i2c:
- cdns: Add timeout for RXDV status bit polling

spi:
- cadence: Remove cdns,is-dma DT property
- cadence: Remove duplicated return
- cadence_versal: Update flash reset delay

memtop:
- Update max memory reserved spaces to 64

Versal Gen 2:
- Aligned addresses with default memory map
- Add support for reading multiboot value

MB-V:
- Make SPL smaller
- Add support for SPI
- Move SPL to run out of BRAM

ZynqMP:
- Change default load address for BL32

----------------------------------------------------------------
Michal Simek (13):
       clk: versal: Use __data macro for moving variable to data section
       clk: versal: Add support for CLK_AUTO_ID
       clk: versal: Cleanup driver
       firmware: xilinx: Add support for enhancement SMC format
       clk: versal: Enable clock driver for Versal Gen 2
       spi: cadence: Remove cdns,is-dma DT property
       arm64: xilinx: Remove unnecessary #address/size-cells
       xilinx: amd: Enable the PCA9541 I2C Bus arbiter
       arm64: versal2: Enable USB5744 usb hub
       cadence_qspi: Remove duplicated return
       arm64: versal2: Read and show multiboot value
       xilinx: versal: Get rid of xlnx-versal-power.h from bindings
       xilinx: mbv32: Disable floating point

Neal Frager (1):
       arch/arm/mach-zynqmp: configure default BL32_LOAD_ADDR

Padmarao Begari (7):
       board: xilinx: Update ESRT after copying GUID
       board: xilinx: Retry FRU EEPROM read on timeout
       i2c: cdns: Add timeout for RXDV status bit polling
       xilinx: mbv: Disable SPL GZIP
       xilinx: mbv: Remove debug UART support
       board: xilinx: add SPL boot device support
       xilinx: mbv: Update defconfigs as per memory map

Venkatesh Yadav Abbarapu (4):
       common: memtop: Update the MEM_RGN_COUNT macro to 64
       arm64: versal2: Update the text base and dtb address
       arm64: versal2: Enable reset and poweroff via sysreset framework
       cadence_qspi: Update the delays for flash reset

  arch/arm/dts/versal-mini-ospi.dtsi             |  3 +-
  arch/arm/dts/versal-net-mini-ospi.dtsi         |  3 +-
  arch/arm/dts/zynqmp-sc-vn-p-b2197-00-revA.dtso |  3 --
  arch/arm/mach-versal2/include/mach/hardware.h  |  4 +-
  arch/arm/mach-zynqmp/Kconfig                   |  2 +-
  board/amd/versal2/board.c                      | 22 ++++++++
  board/xilinx/common/board.c                    | 23 ++++++++-
  board/xilinx/mbv/board.c                       | 14 +++--
  common/memtop.c                                |  2 +-
  configs/amd_versal2_virt_defconfig             |  5 ++
  configs/xilinx_mbv32_defconfig                 | 19 ++++---
  configs/xilinx_versal_virt_defconfig           |  1 +
  configs/xilinx_zynqmp_virt_defconfig           |  1 +
  drivers/clk/Kconfig                            |  2 +-
  drivers/clk/clk_versal.c                       | 49 +++++++++++++-----
  drivers/firmware/firmware-zynqmp.c             | 36 +++++++++++++
  drivers/i2c/i2c-cdns.c                         | 11 ++++
  drivers/spi/cadence_ospi_versal.c              |  7 ++-
  drivers/spi/cadence_qspi.c                     | 23 ++++++---
  drivers/spi/cadence_qspi.h                     |  2 -
  include/dt-bindings/power/xlnx-versal-power.h  | 54 --------------------
  include/zynqmp_firmware.h                      |  8 +++
  22 files changed, 188 insertions(+), 106 deletions(-)
  delete mode 100644 include/dt-bindings/power/xlnx-versal-power.h

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs