[PATCH v8 08/13] arm: mach-k3: am62a7_init: Resume on LPM exit

[Kumar, Udit]

Hi Markus

On 12/23/2025 1:31 AM, Markus Schneider-Pargmann (TI.com) wrote:
> When exiting a low power mode with DDR self-refresh, we can directly
> resume after DDR setup is done. Call the common function to resume.
>
> Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp at baylibre.com>
> ---
>   arch/arm/mach-k3/am62ax/am62a7_init.c | 9 +++++++++
>   1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c
> index c1c7d669a45f53b7528c80d44bf9b914fed1cc10..51b0386853b065d62cd0ecac589e316de5ab4038 100644
> --- a/arch/arm/mach-k3/am62ax/am62a7_init.c
> +++ b/arch/arm/mach-k3/am62ax/am62a7_init.c
> @@ -198,6 +198,15 @@ void board_init_f(ulong dummy)
>   	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
>   	if (ret)
>   		panic("DRAM init failed: %d\n", ret);
> +
> +	if (wkup_ctrl_is_lpm_exit()) {
> +		u64 meta_data_addr;
> +
> +		ret = wkup_r5f_am62_lpm_meta_data_addr(&meta_data_addr);
> +		if (ret)
> +			panic("Failed to get LPM meta data address %d\n", ret);
> +		lpm_resume_from_ddr(meta_data_addr);
> +	}

Could you help, how qos will be set after s2r

see 
https://lore.kernel.org/all/5058275b-a198-43b1-a040-df330775f695@ti.com/ 
as well


>   #endif
>   	spl_enable_cache();
>   
>